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Fri, 12 Mar 2021 15:43:55 -0800 Envelope-to: robh@kernel.org, mdf@kernel.org, devicetree@vger.kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, trix@redhat.com Received: from [10.17.2.60] (port=45574) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lKrRj-0002Xw-1R; Fri, 12 Mar 2021 15:43:55 -0800 Subject: Re: [PATCH V3 XRT Alveo 15/18] fpga: xrt: clock frequence counter platform driver To: Tom Rix , Lizhi Hou , CC: , , , , , , , , Max Zhen References: <20210218064019.29189-1-lizhih@xilinx.com> <20210218064019.29189-16-lizhih@xilinx.com> <85c34149-ccb4-31c9-4a7d-477b30effad2@redhat.com> From: Lizhi Hou Message-ID: <4dcd1a9f-1d96-6c1e-8e70-13cbc312c7b5@xilinx.com> Date: Fri, 12 Mar 2021 15:43:54 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.0 MIME-Version: 1.0 In-Reply-To: <85c34149-ccb4-31c9-4a7d-477b30effad2@redhat.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e39ff261-c358-4f77-0feb-08d8e5b0b313 X-MS-TrafficTypeDiagnostic: DM6PR02MB5419: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2021 23:43:55.3681 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e39ff261-c358-4f77-0feb-08d8e5b0b313 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT015.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB5419 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tom, On 03/06/2021 07:25 AM, Tom Rix wrote: > On 2/17/21 10:40 PM, Lizhi Hou wrote: >> Add clock frequence counter driver. Clock frequence counter is >> a hardware function discovered by walking xclbin metadata. A platform >> device node will be created for it. Other part of driver can read the >> actual clock frequence through clock frequence counter driver. >> >> Signed-off-by: Sonal Santan >> Signed-off-by: Max Zhen >> Signed-off-by: Lizhi Hou >> --- >> drivers/fpga/xrt/include/xleaf/clkfreq.h | 23 +++ >> drivers/fpga/xrt/lib/xleaf/clkfreq.c | 221 +++++++++++++++++++++++ >> 2 files changed, 244 insertions(+) >> create mode 100644 drivers/fpga/xrt/include/xleaf/clkfreq.h >> create mode 100644 drivers/fpga/xrt/lib/xleaf/clkfreq.c >> >> diff --git a/drivers/fpga/xrt/include/xleaf/clkfreq.h b/drivers/fpga/xrt/include/xleaf/clkfreq.h >> new file mode 100644 >> index 000000000000..29fc45e8a31b >> --- /dev/null >> +++ b/drivers/fpga/xrt/include/xleaf/clkfreq.h >> @@ -0,0 +1,23 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +/* >> + * Header file for XRT Clock Counter Leaf Driver >> + * >> + * Copyright (C) 2020-2021 Xilinx, Inc. >> + * >> + * Authors: >> + * Lizhi Hou >> + */ >> + >> +#ifndef _XRT_CLKFREQ_H_ >> +#define _XRT_CLKFREQ_H_ >> + >> +#include "xleaf.h" >> + >> +/* >> + * CLKFREQ driver IOCTL calls. >> + */ >> +enum xrt_clkfreq_ioctl_cmd { >> + XRT_CLKFREQ_READ = XRT_XLEAF_CUSTOM_BASE, /* See comments in xleaf.h */ >> +}; >> + >> +#endif /* _XRT_CLKFREQ_H_ */ >> diff --git a/drivers/fpga/xrt/lib/xleaf/clkfreq.c b/drivers/fpga/xrt/lib/xleaf/clkfreq.c >> new file mode 100644 >> index 000000000000..2482dd2cff47 >> --- /dev/null >> +++ b/drivers/fpga/xrt/lib/xleaf/clkfreq.c >> @@ -0,0 +1,221 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Xilinx Alveo FPGA Clock Frequency Counter Driver >> + * >> + * Copyright (C) 2020-2021 Xilinx, Inc. >> + * >> + * Authors: >> + * Lizhi Hou >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include "metadata.h" >> +#include "xleaf.h" >> +#include "xleaf/clkfreq.h" >> + >> +#define CLKFREQ_ERR(clkfreq, fmt, arg...) \ >> + xrt_err((clkfreq)->pdev, fmt "\n", ##arg) >> +#define CLKFREQ_WARN(clkfreq, fmt, arg...) \ >> + xrt_warn((clkfreq)->pdev, fmt "\n", ##arg) >> +#define CLKFREQ_INFO(clkfreq, fmt, arg...) \ >> + xrt_info((clkfreq)->pdev, fmt "\n", ##arg) >> +#define CLKFREQ_DBG(clkfreq, fmt, arg...) \ >> + xrt_dbg((clkfreq)->pdev, fmt "\n", ##arg) >> + >> +#define XRT_CLKFREQ "xrt_clkfreq" >> + >> +#define OCL_CLKWIZ_STATUS_MASK 0xffff >> + >> +#define OCL_CLKWIZ_STATUS_MEASURE_START 0x1 >> +#define OCL_CLKWIZ_STATUS_MEASURE_DONE 0x2 >> +#define OCL_CLK_FREQ_COUNTER_OFFSET 0x8 >> +#define OCL_CLK_FREQ_V5_COUNTER_OFFSET 0x10 >> +#define OCL_CLK_FREQ_V5_CLK0_ENABLED 0x10000 > Similar to earlier, OCL -> XRT_CLKFREQ > > Use regmap Will change this. > >> + >> +struct clkfreq { >> + struct platform_device *pdev; >> + void __iomem *clkfreq_base; >> + const char *clkfreq_ep_name; >> + struct mutex clkfreq_lock; /* clock counter dev lock */ >> +}; >> + >> +static inline u32 reg_rd(struct clkfreq *clkfreq, u32 offset) >> +{ >> + return ioread32(clkfreq->clkfreq_base + offset); >> +} >> + >> +static inline void reg_wr(struct clkfreq *clkfreq, u32 val, u32 offset) >> +{ >> + iowrite32(val, clkfreq->clkfreq_base + offset); >> +} >> + >> +static u32 clkfreq_read(struct clkfreq *clkfreq) >> +{ > failure returns 0, it would be better if -EINVAL or similar was returned. > > and u32 *freq added as a function parameter Will change this. > >> + u32 freq = 0, status; >> + int times = 10; > 10 is a config parameter, should be a #define Sure. >> + >> + mutex_lock(&clkfreq->clkfreq_lock); >> + reg_wr(clkfreq, OCL_CLKWIZ_STATUS_MEASURE_START, 0); >> + while (times != 0) { >> + status = reg_rd(clkfreq, 0); >> + if ((status & OCL_CLKWIZ_STATUS_MASK) == >> + OCL_CLKWIZ_STATUS_MEASURE_DONE) >> + break; >> + mdelay(1); >> + times--; >> + }; >> + if (times > 0) { > I do not like tristate setting, convert to if-else Will change this. >> + freq = (status & OCL_CLK_FREQ_V5_CLK0_ENABLED) ? >> + reg_rd(clkfreq, OCL_CLK_FREQ_V5_COUNTER_OFFSET) : >> + reg_rd(clkfreq, OCL_CLK_FREQ_COUNTER_OFFSET); >> + } >> + mutex_unlock(&clkfreq->clkfreq_lock); >> + >> + return freq; >> +} >> + >> +static ssize_t freq_show(struct device *dev, struct device_attribute *attr, char *buf) >> +{ >> + struct clkfreq *clkfreq = platform_get_drvdata(to_platform_device(dev)); >> + u32 freq; >> + ssize_t count; >> + >> + freq = clkfreq_read(clkfreq); > unchecked error Will add check. >> + count = snprintf(buf, 64, "%d\n", freq); > %u Sure. >> + >> + return count; >> +} >> +static DEVICE_ATTR_RO(freq); >> + >> +static struct attribute *clkfreq_attrs[] = { >> + &dev_attr_freq.attr, >> + NULL, >> +}; >> + >> +static struct attribute_group clkfreq_attr_group = { >> + .attrs = clkfreq_attrs, >> +}; >> + >> +static int >> +xrt_clkfreq_leaf_ioctl(struct platform_device *pdev, u32 cmd, void *arg) >> +{ >> + struct clkfreq *clkfreq; >> + int ret = 0; >> + >> + clkfreq = platform_get_drvdata(pdev); >> + >> + switch (cmd) { >> + case XRT_XLEAF_EVENT: >> + /* Does not handle any event. */ >> + break; >> + case XRT_CLKFREQ_READ: { > brace not needed Will remove. >> + *(u32 *)arg = clkfreq_read(clkfreq); > Unchecked error Will add check. >> + break; >> + } >> + default: >> + xrt_err(pdev, "unsupported cmd %d", cmd); >> + return -EINVAL; >> + } >> + >> + return ret; >> +} >> + >> +static int clkfreq_remove(struct platform_device *pdev) >> +{ >> + struct clkfreq *clkfreq; >> + >> + clkfreq = platform_get_drvdata(pdev); >> + if (!clkfreq) { >> + xrt_err(pdev, "driver data is NULL"); >> + return -EINVAL; >> + } >> + >> + platform_set_drvdata(pdev, NULL); >> + devm_kfree(&pdev->dev, clkfreq); >> + >> + CLKFREQ_INFO(clkfreq, "successfully removed clkfreq subdev"); >> + return 0; >> +} >> + >> +static int clkfreq_probe(struct platform_device *pdev) >> +{ >> + struct clkfreq *clkfreq = NULL; >> + struct resource *res; >> + int ret; >> + >> + clkfreq = devm_kzalloc(&pdev->dev, sizeof(*clkfreq), GFP_KERNEL); >> + if (!clkfreq) >> + return -ENOMEM; >> + >> + platform_set_drvdata(pdev, clkfreq); >> + clkfreq->pdev = pdev; >> + mutex_init(&clkfreq->clkfreq_lock); >> + >> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); >> + clkfreq->clkfreq_base = ioremap(res->start, res->end - res->start + 1); >> + if (!clkfreq->clkfreq_base) { >> + CLKFREQ_ERR(clkfreq, "map base %pR failed", res); >> + ret = -EFAULT; >> + goto failed; >> + } >> + clkfreq->clkfreq_ep_name = res->name; >> + >> + ret = sysfs_create_group(&pdev->dev.kobj, &clkfreq_attr_group); >> + if (ret) { >> + CLKFREQ_ERR(clkfreq, "create clkfreq attrs failed: %d", ret); >> + goto failed; >> + } >> + >> + CLKFREQ_INFO(clkfreq, "successfully initialized clkfreq subdev"); >> + >> + return 0; >> + >> +failed: >> + clkfreq_remove(pdev); >> + return ret; >> +} >> + >> +static struct xrt_subdev_endpoints xrt_clkfreq_endpoints[] = { >> + { >> + .xse_names = (struct xrt_subdev_ep_names[]) { >> + { .regmap_name = "freq_cnt" }, > name should be closer to filename, maybe 'clock_frequency' or 'clkfreq' 'freq_cnt' is from firmware metadata. I will add #define in metadata.h. Thanks, Lizhi > > Tom > >> + { NULL }, >> + }, >> + .xse_min_ep = 1, >> + }, >> + { 0 }, >> +}; >> + >> +static struct xrt_subdev_drvdata xrt_clkfreq_data = { >> + .xsd_dev_ops = { >> + .xsd_ioctl = xrt_clkfreq_leaf_ioctl, >> + }, >> +}; >> + >> +static const struct platform_device_id xrt_clkfreq_table[] = { >> + { XRT_CLKFREQ, (kernel_ulong_t)&xrt_clkfreq_data }, >> + { }, >> +}; >> + >> +static struct platform_driver xrt_clkfreq_driver = { >> + .driver = { >> + .name = XRT_CLKFREQ, >> + }, >> + .probe = clkfreq_probe, >> + .remove = clkfreq_remove, >> + .id_table = xrt_clkfreq_table, >> +}; >> + >> +void clkfreq_leaf_init_fini(bool init) >> +{ >> + if (init) { >> + xleaf_register_driver(XRT_SUBDEV_CLKFREQ, >> + &xrt_clkfreq_driver, xrt_clkfreq_endpoints); >> + } else { >> + xleaf_unregister_driver(XRT_SUBDEV_CLKFREQ); >> + } >> +}