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Subject: Re: [PATCH] cpufreq: Rudimentary typos fix in the file
 s5pv210-cpufreq.c
To:     Tom Saeger <tom.saeger@oracle.com>,
        Bhaskar Chowdhury <unixbhaskar@gmail.com>,
        Krzysztof Kozlowski <krzk@kernel.org>, rjw@rjwysocki.net,
        viresh.kumar@linaro.org, linux-pm@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20210312120817.12604-1-unixbhaskar@gmail.com>
 <4c0c0738-72c3-7704-500a-28cb1a068aa1@kernel.org> <YEv2RDAdeJEU75ib@Gentoo>
 <20210312233802.bzriltvej5gccsdp@brm-x62-17.us.oracle.com>
From:   Randy Dunlap <rdunlap@infradead.org>
Message-ID: <56934ae8-d9f6-360f-241d-8e8aee448b7d@infradead.org>
Date:   Fri, 12 Mar 2021 15:52:53 -0800
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On 3/12/21 3:38 PM, Tom Saeger wrote:
> On Sat, Mar 13, 2021 at 04:46:20AM +0530, Bhaskar Chowdhury wrote:
>> On 15:01 Fri 12 Mar 2021, Krzysztof Kozlowski wrote:
>>> On 12/03/2021 13:08, Bhaskar Chowdhury wrote:
>>>>
>>>> s/untile/until/
>>>> s/souce/source/
>>>> s/divier/divider/
>>>>

> 
> May as well roll in few more?
> 
> Regards,
> 
> --Tom
> 
> diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
> index a186c0d8a290..6ecef301bd40 100644
> --- a/drivers/cpufreq/s5pv210-cpufreq.c
> +++ b/drivers/cpufreq/s5pv210-cpufreq.c
> @@ -91,7 +91,7 @@ static DEFINE_MUTEX(set_freq_lock);
>  /* Use 800MHz when entering sleep mode */
>  #define SLEEP_FREQ     (800 * 1000)
> 
> -/* Tracks if cpu freqency can be updated anymore */
> +/* Tracks if cpu frequency can be updated anymore */
>  static bool no_cpufreq_access;
> 
>  /*
> @@ -190,7 +190,7 @@ static u32 clkdiv_val[5][11] = {
> 
>  /*
>   * This function set DRAM refresh counter
> - * accoriding to operating frequency of DRAM
> + * according to operating frequency of DRAM
>   * ch: DMC port number 0 or 1
>   * freq: Operating frequency of DRAM(KHz)
>   */
> @@ -320,7 +320,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
> 
>                 /*
>                  * 3. DMC1 refresh count for 133Mhz if (index == L4) is
> -                * true refresh counter is already programed in upper
> +                * true refresh counter is already programmed in upper
>                  * code. 0x287@83Mhz
>                  */
>                 if (!bus_speed_changing)
> 

LGTM.
Acked-by: Randy Dunlap <rdunlap@infradead.org>

Thanks.

-- 
~Randy