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[23.128.96.18]) by mx.google.com with ESMTP id a14si5219121edr.155.2021.03.12.16.40.06; Fri, 12 Mar 2021 16:40:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@intel-com.20150623.gappssmtp.com header.s=20150623 header.b=RH9RDg+D; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229959AbhCMAil (ORCPT + 99 others); Fri, 12 Mar 2021 19:38:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229968AbhCMAiC (ORCPT ); Fri, 12 Mar 2021 19:38:02 -0500 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96566C061761 for ; Fri, 12 Mar 2021 16:38:01 -0800 (PST) Received: by mail-ed1-x536.google.com with SMTP id j3so10438604edp.11 for ; Fri, 12 Mar 2021 16:38:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=V55CsUmF+mr/CmKZQo4eJ9DoAvL0H9UDMjqEpaUB6P8=; b=RH9RDg+D75eQrwkyEdi2sgJFftBidFQeJw2cxeSf+OKCsQ+T66mXWa2etqZaWchhv3 2SAMfRLrOATudtHmv4stvGgXYh4OBWw572sVy0isD1a4sbdZk1vBXiQ4uBt1WBQfvIws BrKRb1E2N38QPKyOeFrUnsJTMHWv8TJeC/nQ/0GXC8kTZbA7blnT2VEKdL0ZjVgux7z6 Grd7Ywj1a79opu4pu5mfmT3WlL5o2Qj/PWPpcqqcTlDGf3INQws5wFAK08kgz6vOwxFB zaEHeEnveJ5uNf/p9fSU/Uhf70o+D58KJLVr32cuMIeqhZatZp8jPwSRuSnxH9epV+xy Uylw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=V55CsUmF+mr/CmKZQo4eJ9DoAvL0H9UDMjqEpaUB6P8=; b=fZ6NFmbpLsQ5fF+411Y4VvaAKdUjExddqKIwQ6TBju4FlrJgHA5mYDi5WtS5ijyMHC Dc3V+ljsXzIfLGZeCV0XFadPk7uuCrZZmua1BKqbjtmnSqKQ7ZwspMY5qExQ3JA9mXWf 6bCfSHFbA4MLrcezrwHrCxdD4ARej7X7tCcmLpqHYAkVdgtk/daLgnmj0NRlPXuNlH+8 Ru/92GemqaZeVyeHjxjkCWFwkQm/kjbOIkHvsB/sJEYC3meRGEYzaXENcWAts8f90StD KtsRZ4c1IM+yt8W+kygBUO5M5zKRyfkQYs6G7fCgej+x9Hy1WWUF40NZj+mLW17jGm3C 6OKA== X-Gm-Message-State: AOAM533xCwpIwO6esXwGAiw63213rzsRjWewDrKc30qqcw1IZYqxQrM5 HpjiHCh2/a8cbIsFpbgoaBtkqHA9GWlQwKS2ryKtgA== X-Received: by 2002:aa7:c3cd:: with SMTP id l13mr17041105edr.52.1615595880149; Fri, 12 Mar 2021 16:38:00 -0800 (PST) MIME-Version: 1.0 References: <20210312231416.GA2304029@bjorn-Precision-5520> In-Reply-To: <20210312231416.GA2304029@bjorn-Precision-5520> From: Dan Williams Date: Fri, 12 Mar 2021 16:37:49 -0800 Message-ID: Subject: Re: [PATCH v1 1/1] PCI: pciehp: Skip DLLSC handling if DPC is triggered To: Bjorn Helgaas Cc: "Kuppuswamy, Sathyanarayanan" , Bjorn Helgaas , Linux PCI , Linux Kernel Mailing List , "Raj, Ashok" , Keith Busch , knsathya@kernel.org, Lukas Wunner Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 12, 2021 at 3:14 PM Bjorn Helgaas wrote: > > On Fri, Mar 12, 2021 at 02:11:03PM -0800, Kuppuswamy, Sathyanarayanan wrote: > > On 3/12/21 1:33 PM, Bjorn Helgaas wrote: > > > On Mon, Mar 08, 2021 at 10:34:10PM -0800, sathyanarayanan.kuppuswamy@linux.intel.com wrote: > > > > From: Kuppuswamy Sathyanarayanan > > > > > +bool is_dpc_reset_active(struct pci_dev *dev) > > > > +{ > > > > + struct pci_host_bridge *host = pci_find_host_bridge(dev->bus); > > > > + u16 status; > > > > + > > > > + if (!dev->dpc_cap) > > > > + return false; > > > > + > > > > + /* > > > > + * If DPC is owned by firmware and EDR is not supported, there is > > > > + * no race between hotplug and DPC recovery handler. So return > > > > + * false. > > > > + */ > > > > + if (!host->native_dpc && !IS_ENABLED(CONFIG_PCIE_EDR)) > > > > + return false; > > > > + > > > > + if (atomic_read_acquire(&dev->dpc_reset_active)) > > > > + return true; > > > > + > > > > + pci_read_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_STATUS, &status); > > > > + > > > > + return !!(status & PCI_EXP_DPC_STATUS_TRIGGER); > > > > > > I know it's somewhat common in drivers/pci/, but I'm not really a > > > big fan of "!!". > > I can change it to use ternary operator. > > (status & PCI_EXP_DPC_STATUS_TRIGGER) ? true : false; > > Ternary isn't terrible, but what's wrong with: > > if (status & PCI_EXP_DPC_STATUS_TRIGGER) > return true; > return false; It was the branch I was trying to get rid of by recommending !!, how about: return (status & PCI_EXP_DPC_STATUS_TRIGGER) == PCI_EXP_DPC_STATUS_TRIGGER; ...just so I know the style preference for future drivers/pci/ work? That at least matches the pattern in the mm helpers that test pte bits. > > which matches the style of the rest of the function. > > Looking at this again, we return "true" if either dpc_reset_active or > PCI_EXP_DPC_STATUS_TRIGGER. I haven't worked this all out, but that > pattern feels racy. I guess the thought is that if > PCI_EXP_DPC_STATUS_TRIGGER is set, dpc_reset_link() will be invoked > soon and we don't want to interfere? Right, and when the trigger is clear then dpc_reset_active keeps holding off the hotplug driver until the dpc reset completes in polling for the link up event.