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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: cadence.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN2PR07MB6160.namprd07.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3545cca6-cbe0-4bf1-de09-08d8e77559a4 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Mar 2021 05:44:07.3402 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: d36035c5-6ce6-4662-a3dc-e762e61ae4c9 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: FOK1+DWln4ggbaFZM2K0RIWaHB3jIpUD5FRfcn7e6KAH5KjVzF00F2jIahmfonuWDKkPVkzDxkgJ76baO6QwlgRA3yzxO9i7+bApncbNWY8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR07MB6400 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-15_01:2021-03-15,2021-03-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 phishscore=0 mlxlogscore=999 priorityscore=1501 bulkscore=0 impostorscore=0 spamscore=0 adultscore=0 malwarescore=0 suspectscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103150039 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Kishon Vijay Abraham I > Sent: Wednesday, March 10, 2021 5:39 PM > To: Kishon Vijay Abraham I ; Vinod Koul > ; Swapnil Kashinath Jakhade > Cc: linux-kernel@vger.kernel.org; linux-phy@lists.infradead.org; Lokesh > Vutla > Subject: [PATCH v3 6/6] phy: cadence-torrent: Add support to drive refclk= out >=20 > EXTERNAL MAIL >=20 >=20 > cmn_refclk_

lines in Torrent SERDES is used for connecting external > reference clock. cmn_refclk_

can also be configured to output the > reference clock. Model this derived reference clock as a "clock" so that > platforms like AM642 EVM can enable it. >=20 > This is used by PCIe to use the same refclk both in local SERDES > and remote device. Add support here to drive refclk out. >=20 > Signed-off-by: Kishon Vijay Abraham I > --- > drivers/phy/cadence/Kconfig | 1 + > drivers/phy/cadence/phy-cadence-torrent.c | 188 +++++++++++++++++++++- > 2 files changed, 186 insertions(+), 3 deletions(-) >=20 Reviewed-by: Swapnil Jakhade Thanks & regards, Swapnil > diff --git a/drivers/phy/cadence/Kconfig b/drivers/phy/cadence/Kconfig > index 432832bdbd16..27e9d6c377e5 100644 > --- a/drivers/phy/cadence/Kconfig > +++ b/drivers/phy/cadence/Kconfig > @@ -7,6 +7,7 @@ config PHY_CADENCE_TORRENT > tristate "Cadence Torrent PHY driver" > depends on OF > depends on HAS_IOMEM > + depends on COMMON_CLK > select GENERIC_PHY > help > Support for Cadence Torrent PHY. > diff --git a/drivers/phy/cadence/phy-cadence-torrent.c > b/drivers/phy/cadence/phy-cadence-torrent.c > index 591a15834b48..c6fee7f75f57 100644 > --- a/drivers/phy/cadence/phy-cadence-torrent.c > +++ b/drivers/phy/cadence/phy-cadence-torrent.c > @@ -7,7 +7,9 @@ > */ >=20 > #include > +#include > #include > +#include > #include > #include > #include > @@ -84,6 +86,8 @@ > #define CMN_PLLSM1_PLLLOCK_TMR 0x0034U > #define CMN_CDIAG_CDB_PWRI_OVRD 0x0041U > #define CMN_CDIAG_XCVRC_PWRI_OVRD 0x0047U > +#define CMN_CDIAG_REFCLK_OVRD 0x004CU > +#define CMN_CDIAG_REFCLK_DRV0_CTRL 0x0050U > #define CMN_BGCAL_INIT_TMR 0x0064U > #define CMN_BGCAL_ITER_TMR 0x0065U > #define CMN_IBCAL_INIT_TMR 0x0074U > @@ -206,6 +210,7 @@ > #define RX_DIAG_ACYA 0x01FFU >=20 > /* PHY PCS common registers */ > +#define PHY_PIPE_CMN_CTRL1 0x0000U > #define PHY_PLL_CFG 0x000EU > #define PHY_PIPE_USB3_GEN2_PRE_CFG0 0x0020U > #define PHY_PIPE_USB3_GEN2_POST_CFG0 0x0022U > @@ -216,6 +221,10 @@ > #define PHY_PMA_CMN_CTRL2 0x0001U > #define PHY_PMA_PLL_RAW_CTRL 0x0003U >=20 > +static const char * const clk_names[] =3D { > + [CDNS_TORRENT_REFCLK_DRIVER] =3D "refclk-driver", > +}; > + > static const struct reg_field phy_pll_cfg =3D > REG_FIELD(PHY_PLL_CFG, 0, 1); >=20 > @@ -231,6 +240,26 @@ static const struct reg_field phy_pma_pll_raw_ctrl = =3D > static const struct reg_field phy_reset_ctrl =3D > REG_FIELD(PHY_RESET, 8, 8); >=20 > +static const struct reg_field phy_pipe_cmn_ctrl1_0 =3D > REG_FIELD(PHY_PIPE_CMN_CTRL1, 0, 0); > + > +#define REFCLK_OUT_NUM_CMN_CONFIG 5 > + > +enum cdns_torrent_refclk_out_cmn { > + CMN_CDIAG_REFCLK_OVRD_4, > + CMN_CDIAG_REFCLK_DRV0_CTRL_1, > + CMN_CDIAG_REFCLK_DRV0_CTRL_4, > + CMN_CDIAG_REFCLK_DRV0_CTRL_5, > + CMN_CDIAG_REFCLK_DRV0_CTRL_6, > +}; > + > +static const struct reg_field refclk_out_cmn_cfg[] =3D { > + [CMN_CDIAG_REFCLK_OVRD_4] =3D > REG_FIELD(CMN_CDIAG_REFCLK_OVRD, 4, 4), > + [CMN_CDIAG_REFCLK_DRV0_CTRL_1] =3D > REG_FIELD(CMN_CDIAG_REFCLK_DRV0_CTRL, 1, 1), > + [CMN_CDIAG_REFCLK_DRV0_CTRL_4] =3D > REG_FIELD(CMN_CDIAG_REFCLK_DRV0_CTRL, 4, 4), > + [CMN_CDIAG_REFCLK_DRV0_CTRL_5] =3D > REG_FIELD(CMN_CDIAG_REFCLK_DRV0_CTRL, 5, 5), > + [CMN_CDIAG_REFCLK_DRV0_CTRL_6] =3D > REG_FIELD(CMN_CDIAG_REFCLK_DRV0_CTRL, 6, 6), > +}; > + > enum cdns_torrent_phy_type { > TYPE_NONE, > TYPE_DP, > @@ -279,6 +308,8 @@ struct cdns_torrent_phy { > struct regmap_field *phy_pma_cmn_ctrl_2; > struct regmap_field *phy_pma_pll_raw_ctrl; > struct regmap_field *phy_reset_ctrl; > + struct clk *clks[CDNS_TORRENT_REFCLK_DRIVER + 1]; > + struct clk_onecell_data clk_data; > }; >=20 > enum phy_powerstate { > @@ -288,6 +319,16 @@ enum phy_powerstate { > POWERSTATE_A3 =3D 3, > }; >=20 > +struct cdns_torrent_derived_refclk { > + struct clk_hw hw; > + struct regmap_field *phy_pipe_cmn_ctrl1_0; > + struct regmap_field > *cmn_fields[REFCLK_OUT_NUM_CMN_CONFIG]; > + struct clk_init_data clk_data; > +}; > + > +#define to_cdns_torrent_derived_refclk(_hw) \ > + container_of(_hw, struct > cdns_torrent_derived_refclk, hw) > + > static int cdns_torrent_phy_init(struct phy *phy); > static int cdns_torrent_dp_init(struct phy *phy); > static int cdns_torrent_dp_run(struct cdns_torrent_phy *cdns_phy, > @@ -1604,6 +1645,108 @@ static int cdns_torrent_dp_run(struct > cdns_torrent_phy *cdns_phy, u32 num_lanes) > return ret; > } >=20 > +static int cdns_torrent_derived_refclk_enable(struct clk_hw *hw) > +{ > + struct cdns_torrent_derived_refclk *derived_refclk =3D > to_cdns_torrent_derived_refclk(hw); > + > + regmap_field_write(derived_refclk- > >cmn_fields[CMN_CDIAG_REFCLK_DRV0_CTRL_6], 0); > + regmap_field_write(derived_refclk- > >cmn_fields[CMN_CDIAG_REFCLK_DRV0_CTRL_4], 1); > + regmap_field_write(derived_refclk- > >cmn_fields[CMN_CDIAG_REFCLK_DRV0_CTRL_5], 1); > + regmap_field_write(derived_refclk- > >cmn_fields[CMN_CDIAG_REFCLK_DRV0_CTRL_1], 0); > + regmap_field_write(derived_refclk- > >cmn_fields[CMN_CDIAG_REFCLK_OVRD_4], 1); > + regmap_field_write(derived_refclk->phy_pipe_cmn_ctrl1_0, 1); > + > + return 0; > +} > + > +static void cdns_torrent_derived_refclk_disable(struct clk_hw *hw) > +{ > + struct cdns_torrent_derived_refclk *derived_refclk =3D > to_cdns_torrent_derived_refclk(hw); > + > + regmap_field_write(derived_refclk->phy_pipe_cmn_ctrl1_0, 0); > +} > + > +static int cdns_torrent_derived_refclk_is_enabled(struct clk_hw *hw) > +{ > + struct cdns_torrent_derived_refclk *derived_refclk =3D > to_cdns_torrent_derived_refclk(hw); > + int val; > + > + regmap_field_read(derived_refclk->phy_pipe_cmn_ctrl1_0, &val); > + > + return !!val; > +} > + > +static const struct clk_ops cdns_torrent_derived_refclk_ops =3D { > + .enable =3D cdns_torrent_derived_refclk_enable, > + .disable =3D cdns_torrent_derived_refclk_disable, > + .is_enabled =3D cdns_torrent_derived_refclk_is_enabled, > +}; > + > +static int cdns_torrent_derived_refclk_register(struct cdns_torrent_phy > *cdns_phy) > +{ > + struct cdns_torrent_derived_refclk *derived_refclk; > + struct device *dev =3D cdns_phy->dev; > + struct regmap_field *field; > + struct clk_init_data *init; > + const char *parent_name; > + struct regmap *regmap; > + char clk_name[100]; > + struct clk *clk; > + int i; > + > + derived_refclk =3D devm_kzalloc(dev, sizeof(*derived_refclk), > GFP_KERNEL); > + if (!derived_refclk) > + return -ENOMEM; > + > + snprintf(clk_name, sizeof(clk_name), "%s_%s", dev_name(dev), > + clk_names[CDNS_TORRENT_REFCLK_DRIVER]); > + > + clk =3D devm_clk_get_optional(dev, "phy_en_refclk"); > + if (IS_ERR(clk)) { > + dev_err(dev, "No parent clock for derived_refclk\n"); > + return PTR_ERR(clk); > + } > + > + init =3D &derived_refclk->clk_data; > + > + if (clk) { > + parent_name =3D __clk_get_name(clk); > + init->parent_names =3D &parent_name; > + init->num_parents =3D 1; > + } > + init->ops =3D &cdns_torrent_derived_refclk_ops; > + init->flags =3D 0; > + init->name =3D clk_name; > + > + regmap =3D cdns_phy->regmap_phy_pcs_common_cdb; > + field =3D devm_regmap_field_alloc(dev, regmap, > phy_pipe_cmn_ctrl1_0); > + if (IS_ERR(field)) { > + dev_err(dev, "phy_pipe_cmn_ctrl1_0 reg field init failed\n"); > + return PTR_ERR(field); > + } > + derived_refclk->phy_pipe_cmn_ctrl1_0 =3D field; > + > + regmap =3D cdns_phy->regmap_common_cdb; > + for (i =3D 0; i < REFCLK_OUT_NUM_CMN_CONFIG; i++) { > + field =3D devm_regmap_field_alloc(dev, regmap, > refclk_out_cmn_cfg[i]); > + if (IS_ERR(field)) { > + dev_err(dev, "CMN reg field init failed\n"); > + return PTR_ERR(field); > + } > + derived_refclk->cmn_fields[i] =3D field; > + } > + > + derived_refclk->hw.init =3D init; > + > + clk =3D devm_clk_register(dev, &derived_refclk->hw); > + if (IS_ERR(clk)) > + return PTR_ERR(clk); > + > + cdns_phy->clks[CDNS_TORRENT_REFCLK_DRIVER] =3D clk; > + > + return 0; > +} > + > static int cdns_torrent_phy_on(struct phy *phy) > { > struct cdns_torrent_inst *inst =3D phy_get_drvdata(phy); > @@ -2071,6 +2214,37 @@ int cdns_torrent_phy_configure_multilink(struct > cdns_torrent_phy *cdns_phy) > return 0; > } >=20 > +static void cdns_torrent_clk_cleanup(struct cdns_torrent_phy *cdns_phy) > +{ > + struct device *dev =3D cdns_phy->dev; > + > + of_clk_del_provider(dev->of_node); > +} > + > +static int cdns_torrent_clk_register(struct cdns_torrent_phy *cdns_phy) > +{ > + struct device *dev =3D cdns_phy->dev; > + struct device_node *node =3D dev->of_node; > + int ret; > + > + ret =3D cdns_torrent_derived_refclk_register(cdns_phy); > + if (ret) { > + dev_err(dev, "failed to register derived refclk\n"); > + return ret; > + } > + > + cdns_phy->clk_data.clks =3D cdns_phy->clks; > + cdns_phy->clk_data.clk_num =3D CDNS_TORRENT_REFCLK_DRIVER + 1; > + > + ret =3D of_clk_add_provider(node, of_clk_src_onecell_get, &cdns_phy- > >clk_data); > + if (ret) { > + dev_err(dev, "Failed to add clock provider: %s\n", node- > >name); > + return ret; > + } > + > + return 0; > +} > + > static int cdns_torrent_phy_probe(struct platform_device *pdev) > { > struct cdns_torrent_phy *cdns_phy; > @@ -2134,17 +2308,21 @@ static int cdns_torrent_phy_probe(struct > platform_device *pdev) > if (ret) > return ret; >=20 > + ret =3D cdns_torrent_clk_register(cdns_phy); > + if (ret) > + return ret; > + > ret =3D clk_prepare_enable(cdns_phy->clk); > if (ret) { > dev_err(cdns_phy->dev, "Failed to prepare ref clock\n"); > - return ret; > + goto clk_cleanup; > } >=20 > cdns_phy->ref_clk_rate =3D clk_get_rate(cdns_phy->clk); > if (!(cdns_phy->ref_clk_rate)) { > dev_err(cdns_phy->dev, "Failed to get ref clock rate\n"); > - clk_disable_unprepare(cdns_phy->clk); > - return -EINVAL; > + ret =3D -EINVAL; > + goto clk_disable; > } >=20 > /* Enable APB */ > @@ -2323,7 +2501,10 @@ static int cdns_torrent_phy_probe(struct > platform_device *pdev) > reset_control_put(cdns_phy->phys[i].lnk_rst); > of_node_put(child); > reset_control_assert(cdns_phy->apb_rst); > +clk_disable: > clk_disable_unprepare(cdns_phy->clk); > +clk_cleanup: > + cdns_torrent_clk_cleanup(cdns_phy); > return ret; > } >=20 > @@ -2340,6 +2521,7 @@ static int cdns_torrent_phy_remove(struct > platform_device *pdev) > } >=20 > clk_disable_unprepare(cdns_phy->clk); > + cdns_torrent_clk_cleanup(cdns_phy); >=20 > return 0; > } > -- > 2.17.1