Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp3319601pxf; Mon, 15 Mar 2021 07:04:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxzyD1bxdGibnW8SXLZROM5zdgPzG2C0R6itTHyBEIeGri1QCyO8sjH1c5W6po3tmbN+Znq X-Received: by 2002:a17:906:b747:: with SMTP id fx7mr24359118ejb.474.1615817078194; Mon, 15 Mar 2021 07:04:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1615817078; cv=none; d=google.com; s=arc-20160816; b=tA4+XNN/klfYhReR2VbqSthvZATETC7JQefY+NVLgJnoVvP7qVL1bzuYDgKYLLs6cE RtCt2rWmHfCbjvwUU8GphbpYnj0dyeEG8cPqK1MowPo4xCUiDo4kwTqjb/98hUi852Ux 6YIuzNdLSe7DPUSV8JrFIJpmus8743rO4IBKVnhruBcxPeV+W6C+O32rHOV/Xg2Uj0Mn K1SQ83IDJmuH58revqbyDN9EhFFRSqgDI4beofVzTrvZZ9r180UsyrGBe+KzLwR6zHV2 x//EqgDT+urkNUA66T2T+kNjU99a2GqU9eEkDixlLNlFApsBJDzOvj/wsGakv4t1MCO1 TWaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=718vuip56zxYYRwjZP8bQTj9AMvftSlf90VwOqIIFvg=; b=Kt6GWWHHQ4EOONZN4vJQv+m3RBhidpy5Uywsju/CYqTS723iLZlkNs/mmZoIBUzz1Z DUYOejGl/wVA5NuIpDLVCSMia+RgpXAQGTb69Xw9LXL9bYtBZqDf6bs+Kc7ehmiVFYQm KEqJcRhyv+ctz2YYX7Rpti5fU97ioO69Jq+GbEWenlrvzdOpZQaW7POV++7QFpGHQhbw 5LXHACcNpSePvP1PoFW2BQoJ01nCjjrLbyNphhOWftZKM3zh8Ng42OyJ5K//iGXxD27J Ldx4GGLb2yUFre3LNsQBVauV1eO4FXNEJC+hooDM3CLiPE1ZHkvU/FJ/JX4DN9yKBdqr nIOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=TiqHA7Nx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z2si1571950eju.371.2021.03.15.07.04.15; Mon, 15 Mar 2021 07:04:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=TiqHA7Nx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233722AbhCOOCV (ORCPT + 99 others); Mon, 15 Mar 2021 10:02:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:33462 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231730AbhCON4u (ORCPT ); Mon, 15 Mar 2021 09:56:50 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 432C664EB6; Mon, 15 Mar 2021 13:56:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1615816610; bh=SlrC4om016WlI29WQ3wkSHEORrg+Jw0OzAcHnp3Y4z0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TiqHA7Nxzi6rppZcjGP643cfpb8Gd4ODqIGk5gZpY85BlJmA6xZ942lpHULbgqXWq YL9reG5LJprj3W3u8QJ1YxfusIcPxZvZ1ADjNvdqtUNX9YFKi4jsnXfc4M9n+zNP0g QfrZMBQPiUgNkqTw0HB05ezN+kzfWpjpC1Uvump4= From: gregkh@linuxfoundation.org To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Joakim Zhang , Marc Kleine-Budde Subject: [PATCH 5.11 019/306] can: flexcan: assert FRZ bit in flexcan_chip_freeze() Date: Mon, 15 Mar 2021 14:51:22 +0100 Message-Id: <20210315135508.265217894@linuxfoundation.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210315135507.611436477@linuxfoundation.org> References: <20210315135507.611436477@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Greg Kroah-Hartman From: Joakim Zhang commit 449052cfebf624b670faa040245d3feed770d22f upstream. Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although the reset value is 1b'1. This is a prepare patch, later patch will invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze mode acknowledge. Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze") Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com Signed-off-by: Joakim Zhang Signed-off-by: Marc Kleine-Budde Signed-off-by: Greg Kroah-Hartman --- drivers/net/can/flexcan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -701,7 +701,7 @@ static int flexcan_chip_freeze(struct fl u32 reg; reg = priv->read(®s->mcr); - reg |= FLEXCAN_MCR_HALT; + reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT; priv->write(reg, ®s->mcr); while (timeout-- && !(priv->read(®s->mcr) & FLEXCAN_MCR_FRZ_ACK))