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[23.128.96.18]) by mx.google.com with ESMTP id pw11si10862736ejb.2.2021.03.15.07.04.44; Mon, 15 Mar 2021 07:05:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b="QfpO/FW8"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233854AbhCOOCb (ORCPT + 99 others); Mon, 15 Mar 2021 10:02:31 -0400 Received: from mail.kernel.org ([198.145.29.99]:33286 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231761AbhCON4w (ORCPT ); Mon, 15 Mar 2021 09:56:52 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id A545264EF3; Mon, 15 Mar 2021 13:56:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1615816611; bh=fZ5bpEGo2ECd2IrUv8VvvruxbLgCRsiLALfekIblgjY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QfpO/FW8XLxBgoHfiUtG1eCTdo1rneTIBQ3PVtbuwQJUVFJb8d6U3mgx5xVs9ko56 fd8R1juU0Y5PWQMx+L4Ov865ywUR+EfyjR0zoy7bLnf1DjijUnuFBI7TM4KgbrKK+K GeRtGOOMUA5byjCTJD2MKUG49+Bym7h7RyexyA2Y= From: gregkh@linuxfoundation.org To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Joakim Zhang , Marc Kleine-Budde Subject: [PATCH 5.10 012/290] can: flexcan: assert FRZ bit in flexcan_chip_freeze() Date: Mon, 15 Mar 2021 14:51:45 +0100 Message-Id: <20210315135542.359270989@linuxfoundation.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210315135541.921894249@linuxfoundation.org> References: <20210315135541.921894249@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Greg Kroah-Hartman From: Joakim Zhang commit 449052cfebf624b670faa040245d3feed770d22f upstream. Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although the reset value is 1b'1. This is a prepare patch, later patch will invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze mode acknowledge. Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze") Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com Signed-off-by: Joakim Zhang Signed-off-by: Marc Kleine-Budde Signed-off-by: Greg Kroah-Hartman --- drivers/net/can/flexcan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -662,7 +662,7 @@ static int flexcan_chip_freeze(struct fl u32 reg; reg = priv->read(®s->mcr); - reg |= FLEXCAN_MCR_HALT; + reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT; priv->write(reg, ®s->mcr); while (timeout-- && !(priv->read(®s->mcr) & FLEXCAN_MCR_FRZ_ACK))