Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp3321888pxf; Mon, 15 Mar 2021 07:06:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwZqwL9VoHbficeZS77g4sC0QY1YBymTLQRY9WuyxPjy7DV93cZxYMfOA1zt6koUO1if5Jl X-Received: by 2002:aa7:d3d8:: with SMTP id o24mr30197495edr.165.1615817219337; Mon, 15 Mar 2021 07:06:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1615817219; cv=none; d=google.com; s=arc-20160816; b=wEATi9paZtsW7yL2A3p6MuI3ytywC9RfWkKQyCshRPYXe4/zP6TOusnp5HP7cdABpm IZta2gJxR13+HmHBFdmwyVFTi7YMUprS0L5YUY/mEliNAutyPQzQtgcGVYuycnwVTMOJ l76CjlGkvDLHpKyP/eY4nnhw9vtlXg2Qdw7yFhLanrBqFxaK/uRUumhZze4MscylDrts gpiOfVpZn+jOjnfS2dUawMQb/rTHgH3DxgIy2scpL/LSh1IYaSRw3XX9qBJcp5XTXxW/ V6gT0b8hABRQ6aD8DpwiIDr6EqZdyoRXuH7hiU0yq7iqMOLZpafdY7cpJGXevk4tS+XW n7dQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Xb0Oc/9lbw0mY30c6xo1xoJ7gm+w2OinaxpqzeebnUw=; b=qcuMjiqN+rduSQTXKx+Y6SIuFmthxicDeRhgnwfKyj04Teofy2/kpbp9WW8DI5rQQL bGhF6eOn1t27SLkXqEOy8tnROmm5VifxDKwIMG7oE3r8pMFToDSMX27pBXH+006t+XB1 s7yCyoj6D01qUSbckVFjxl+KS/5TaHAcHhdqrBtt/QcOp3DmdOCOolqgnUrpreaqAXc+ 1S7X0aNcBu4cnAQi58COTFSRmHw8TznCHSjZEAMTtWofGSO/FGXdeibt8C+uMlaT1QK3 mS10JcOOnNcWVUk4yJovHNC0XiTPTx0kOz4igF6GaKEm4O0AVYDlBRX4XjyLmGZ1ncNM HJTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=kStv1wVe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m15si11847034edj.170.2021.03.15.07.06.36; Mon, 15 Mar 2021 07:06:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=kStv1wVe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234185AbhCOODC (ORCPT + 99 others); Mon, 15 Mar 2021 10:03:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:34114 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229494AbhCON5G (ORCPT ); Mon, 15 Mar 2021 09:57:06 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id AE22B64EF8; Mon, 15 Mar 2021 13:57:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1615816623; bh=xzvWaLslCjVyEyJRrHIraB3ZL1rUNymL+0aC4Pgv+Eg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kStv1wVezYMTvh/TnHmNlHIgDtGUHCLcH8YLGUpbjVxNvyDfie8Z3P+L0deubez2a xVuAW7qyP6Z5RemFzXfftMlIPMqy7SuGDP4V7nwJ75Nh21/Nwgfax21PBSIxduoH3t Ul6F3AQIA59t3ux2qxfj5SJY5rAKMaiEF5uqFsrA= From: gregkh@linuxfoundation.org To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Joakim Zhang , Marc Kleine-Budde Subject: [PATCH 5.4 010/168] can: flexcan: assert FRZ bit in flexcan_chip_freeze() Date: Mon, 15 Mar 2021 14:54:02 +0100 Message-Id: <20210315135550.683448596@linuxfoundation.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210315135550.333963635@linuxfoundation.org> References: <20210315135550.333963635@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Greg Kroah-Hartman From: Joakim Zhang commit 449052cfebf624b670faa040245d3feed770d22f upstream. Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although the reset value is 1b'1. This is a prepare patch, later patch will invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze mode acknowledge. Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze") Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com Signed-off-by: Joakim Zhang Signed-off-by: Marc Kleine-Budde Signed-off-by: Greg Kroah-Hartman --- drivers/net/can/flexcan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -548,7 +548,7 @@ static int flexcan_chip_freeze(struct fl u32 reg; reg = priv->read(®s->mcr); - reg |= FLEXCAN_MCR_HALT; + reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT; priv->write(reg, ®s->mcr); while (timeout-- && !(priv->read(®s->mcr) & FLEXCAN_MCR_FRZ_ACK))