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Miller" , Microchip UNG Driver List , , Subject: Re: [PATCH v15 0/4] Adding the Sparx5 Serdes driver Message-ID: <20210315102640.461e473f@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> In-Reply-To: References: <20210218161451.3489955-1-steen.hegelund@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 15 Mar 2021 16:04:24 +0100 Steen Hegelund wrote: > Hi Kishon, Vinod, Andrew, Jacub, and David, > > I just wanted to know if you think that the Generic PHY subsystem might > not be the right place for this Ethernet SerDes PHY driver after all. > > Originally I chose this subsystem for historic reasons: The > Microchip/Microsemi Ocelot SerDes driver was added here when it was > upstreamed. > On the other hand the Ocelot Serdes can do both PCIe and Ethernet, so > it might fit the signature of a generic PHY better. Are you saying this PHY is Ethernet only? > At the moment the acceptance of the Sparx5 Serdes driver is blocking us > from adding the Sparx5 SwitchDev driver (to net), so it is really > important for us to resolve which subsystem the Serdes driver belongs > to. > > I am very much looking forward to your response. FWIW even if this is merged via gen phy subsystem we can pull it into net-next as well to unblock your other work in this dev cycle. You just need to send the patches as a pull request, based on merge-base between the gen phy tree and net-next.