Date: Wed, 4 Oct 2006 09:30:25 -0700
From: Andrew Morton <akpm@osdl.org>
To: tim.c.chen@linux.intel.com
Cc: Jeremy Fitzhardinge <jeremy@goop.org>, herbert@gondor.apana.org.au,
       linux-kernel@vger.kernel.org, leonid.i.ananiev@intel.com
Subject: Re: [PATCH] Fix WARN_ON / WARN_ON_ONCE regression
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On Wed, 04 Oct 2006 06:21:35 -0700
Tim Chen <tim.c.chen@linux.intel.com> wrote:

> On Tue, 2006-10-03 at 21:39 -0700, Jeremy Fitzhardinge wrote:
> 
> > 
> > I don't think you've proved your case here.  Do you *know* there are 
> > extra cache misses (ie, measuring them), or is it just your theory to 
> > explain a performance regression?
> > 
> 
> I have measured the cache miss with tool.  So it is not just my theory.
> 

And what did that tool tell you?

Guys.  Please.  Help us out here.  None of this makes sense, and it's
possible that we have an underlying problem in there which we need to know
about.

Please don't just ignore my questions.  *why* are we getting a cache miss
rate on that integer which is causing measurable performance changes?  If
we're reading it that frequently then the variable should be in cache(!).

Again: do you know which callsite is causing the problem?  I assume one of
the ones in softirq.c?  Do you know what the cache miss frequency is?  etc.

Because if we don't answer these questions there's an excellent chance that
the problem (whatever it is) will come back and bite us again.
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