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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id e11sm17230909pfm.24.2021.03.16.10.04.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Mar 2021 10:04:22 -0700 (PDT) Date: Tue, 16 Mar 2021 11:04:20 -0600 From: Mathieu Poirier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mike.leach@linaro.org, anshuman.khandual@arm.com, leo.yan@linaro.org, Peter Zijlstra Subject: Re: [PATCH v4 02/19] perf: aux: Add CoreSight PMU buffer formats Message-ID: <20210316170420.GA1387186@xps15> References: <20210225193543.2920532-1-suzuki.poulose@arm.com> <20210225193543.2920532-3-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210225193543.2920532-3-suzuki.poulose@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 25, 2021 at 07:35:26PM +0000, Suzuki K Poulose wrote: > CoreSight PMU supports aux-buffer for the ETM tracing. The trace > generated by the ETM (associated with individual CPUs, like Intel PT) > is captured by a separate IP (CoreSight TMC-ETR/ETF until now). > > The TMC-ETR applies formatting of the raw ETM trace data, as it > can collect traces from multiple ETMs, with the TraceID to indicate > the source of a given trace packet. > > Arm Trace Buffer Extension is new "sink" IP, attached to individual > CPUs and thus do not provide additional formatting, like TMC-ETR. > > Additionally, a system could have both TRBE *and* TMC-ETR for > the trace collection. e.g, TMC-ETR could be used as a single > trace buffer to collect data from multiple ETMs to correlate > the traces from different CPUs. It is possible to have a > perf session where some events end up collecting the trace > in TMC-ETR while the others in TRBE. Thus we need a way > to identify the type of the trace for each AUX record. > The gist of this patch is to introduce formatted and raw trace format. To me the above paragraph brings confusion to the changelog, especially since we don't allow events belonging to the same session to use different types of sinks. I would simply remove it. > Define the trace formats exported by the CoreSight PMU. > We don't define the flags following the "ETM" as this > information is available to the user when issuing > the session. What is missing is the additional > formatting applied by the "sink" which is decided > at the runtime and the user may not have a control on. > > So we define : > - CORESIGHT format (indicates the Frame format) > - RAW format (indicates the format of the source) > > The default value is CORESIGHT format for all the records > (i,e == 0). Add the RAW format for others that use > raw format. > > Cc: Peter Zijlstra > Cc: Mike Leach > Cc: Mathieu Poirier > Cc: Leo Yan > Cc: Anshuman Khandual > Reviewed-by: Mike Leach > Signed-off-by: Suzuki K Poulose > --- > Changes from previous: > - Split from the coresight driver specific code > for ease of merging > --- > include/uapi/linux/perf_event.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h > index f006eeab6f0e..63971eaef127 100644 > --- a/include/uapi/linux/perf_event.h > +++ b/include/uapi/linux/perf_event.h > @@ -1162,6 +1162,10 @@ enum perf_callchain_context { > #define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ > #define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */ > > +/* CoreSight PMU AUX buffer formats */ > +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for backward compatibility */ > +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of the source */ > + Is "CORESIGHT" really a format? We are playing with words and the end result is the same but I think PERF_AUX_FLAG_CORESIGHT_FORMAT_FORMATTED would be best, or event: #define PERF_AUX_FLAG_CORESIGHT_TRACE_FORMATTED 0x0000 /* Default for backward compatibility */ #define PERF_AUX_FLAG_CORESIGHT_TRACE_RAW 0x0100 /* Raw format of the source */ Regardless, for patches 01 and 02: Reviewed-by: Mathieu Poirier > #define PERF_FLAG_FD_NO_GROUP (1UL << 0) > #define PERF_FLAG_FD_OUTPUT (1UL << 1) > #define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ > -- > 2.24.1 >