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Miller" , Maxime Coquelin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Jose Abreu , Giuseppe Cavallaro , Andrew Lunn , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Ong Boon Leong , Wong Vee Khee Subject: Re: [RESEND v1 net-next 3/5] net: stmmac: introduce MSI Interrupt routines for mac, safety, RX & TX Message-ID: <20210316142941.3ea1e24d@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> In-Reply-To: <20210316121823.18659-4-weifeng.voon@intel.com> References: <20210316121823.18659-1-weifeng.voon@intel.com> <20210316121823.18659-4-weifeng.voon@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 16 Mar 2021 20:18:21 +0800 Voon Weifeng wrote: > From: Ong Boon Leong > > Now we introduce MSI interrupt service routines and hook these routines > up if stmmac_open() sees valid irq line being requested:- > > stmmac_mac_interrupt() :- MAC (dev->irq), WOL (wol_irq), LPI (lpi_irq) > stmmac_safety_interrupt() :- Safety Feat Correctible Error (sfty_ce_irq) > & Uncorrectible Error (sfty_ue_irq) > stmmac_msi_intr_rx() :- For all RX MSI irq (rx_irq) > stmmac_msi_intr_tx() :- For all TX MSI irq (tx_irq) Do you split RX and TX irqs out on purpose? Most commonly one queue pair maps to one CPU, so using single IRQ for Rx and Tx results in fewer IRQs being triggered and better system performance. > Each of IRQs will have its unique name so that we can differentiate > them easily under /proc/interrupts. > > Signed-off-by: Ong Boon Leong > Signed-off-by: Voon Weifeng > +static int stmmac_request_irq(struct net_device *dev) This function is a one huge if statement, please factor out both sides into separate subfunctions. > + netdev_info(priv->dev, "PASS: requesting IRQs\n"); Does the user really need to know interrupts were requested on every probe? > + return ret; return 0; ? > +irq_error: > + stmmac_free_irq(dev, irq_err, irq_idx); > + return ret; > +}