Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp4472562pxf; Tue, 16 Mar 2021 14:36:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyPMKU6WU52Fs8paGs6J1gaHeW60+CWDk4F2r+1ZDv32nyagtXoZKiBdVSv5+JwvlffPC2q X-Received: by 2002:aa7:c7d5:: with SMTP id o21mr37613929eds.166.1615930607110; Tue, 16 Mar 2021 14:36:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1615930607; cv=none; d=google.com; s=arc-20160816; b=hTOjZoa+6xO86Ucq2hi2DzZ4AMp/ncxRO7xQPUntX5unpQRyQuVbW8uuIFvoFBlJ7v eCgE4/3QmKRe2zayePaHoRYXLP8OXOwIfvUlcpYxhGTnl4Tq8xT7FUi7DhcCkyeVIiXi d4YJXnWukNasyds6h1GAStAGoUKT4sgw265FMEK3URVId5M2/hH/TL5oMhY0MHMMDFTt 7oRA53TeU97M7JBIrLD6Lg/fdo/yWCf8pOLj/fG9hNHAg615vVZ/GLxceswlBmwjelFT gdc7v+KVnEh8Ia7TS5dymQLicrLIv4lNJniS9LLiDl6v0ZhgtK9HL0sRC2/CQfz9Ssf0 7UvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date :dkim-signature; bh=EQNz3Pwls8ggEaGmAwiSam6GAk5WQSwqI+5h7r+uoyk=; b=uCtX1jejRq4+d/Up8XyXzKvOjD0hVznxujYKyCytmcwkYzG5Ip09KxqvfPlTUJqLzr mEheqRihYVyeW73WtSs17T4Um/QSDOr8PQCY1JCRHc5LycWU4wZzAr5WvTEgeiy3bLIr LP7ZwiIfj1thA97476ScI/riuiTeQKpeEJ9v7sPJhOazyPfGDZI6NwzY/CDCHduxcuyJ tkarp6lA5/SxPgc1QvVyo8KqNSrV+5k5lYpebdHcHLoGISofysOH/2fozXT81Smpud2F so1brxMWKbuDQBpI3rLhmG3GA7beetmTmcf0F+66EXf+gcuCCQSB5YCgBnhwz5Rfc3DL C+bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uIBaYEjH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dk14si14227426edb.548.2021.03.16.14.36.24; Tue, 16 Mar 2021 14:36:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uIBaYEjH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229526AbhCPVcx (ORCPT + 99 others); Tue, 16 Mar 2021 17:32:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:46138 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229498AbhCPVcY (ORCPT ); Tue, 16 Mar 2021 17:32:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 8F8B264F90; Tue, 16 Mar 2021 21:32:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615930344; bh=A8tS3BLwnxw3/M8kJr1pEOw/ZrskCZFgDoMyFEzKfUM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=uIBaYEjHXoV2WZv0Cjk+kpgy2es1yrAwt2Ja7iQO0R0eH8npYVHk1+SLA2VsU/qDn n/TqTSMBAdefLX4s58L8SdQhJ/YBy6BERA7zScIb/FFaE54RdW7B3EaALBdi+OSCf2 5FUbGaw07DRwiL9y6pAViUNpxriH8+1NTfuUBjnr616sh5o2yCobKEs8laSTFr1YLy FsaGGDepmh28SB/fnrCGbsE+IUBtIqwOvkz8MhTC6qoURPSa7Ma9clGb4GUgn26aX1 kM1y1NcKh7FuX0kGqhBluWiKyte/W5M5V8WYIVD5422DtI2x2BDJkhmIBBbQyaF9BP csNkFnKDYnS1g== Date: Tue, 16 Mar 2021 14:32:22 -0700 From: Jakub Kicinski To: Voon Weifeng Cc: "David S . Miller" , Maxime Coquelin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Jose Abreu , Giuseppe Cavallaro , Andrew Lunn , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Ong Boon Leong , Wong Vee Khee Subject: Re: [RESEND v1 net-next 4/5] stmmac: intel: add support for multi-vector msi and msi-x Message-ID: <20210316143222.74480318@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> In-Reply-To: <20210316121823.18659-5-weifeng.voon@intel.com> References: <20210316121823.18659-1-weifeng.voon@intel.com> <20210316121823.18659-5-weifeng.voon@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 16 Mar 2021 20:18:22 +0800 Voon Weifeng wrote: > From: Ong Boon Leong > > Intel mgbe controller supports multi-vector interrupts: > msi_rx_vec 0,2,4,6,8,10,12,14 > msi_tx_vec 1,3,5,7,9,11,13,15 > msi_sfty_ue_vec 26 > msi_sfty_ce_vec 27 > msi_lpi_vec 28 > msi_mac_vec 29 > > During probe(), the driver will starts with request allocation for > multi-vector interrupts. If it fails, then it will automatically fallback > to request allocation for single interrupts. > > Signed-off-by: Ong Boon Leong > Co-developed-by: Voon Weifeng > Signed-off-by: Voon Weifeng > + > +static int stmmac_config_multi_msi(struct pci_dev *pdev, > + struct plat_stmmacenet_data *plat, > + struct stmmac_resources *res) > +{ > + int ret; > + int i; > + > + ret = pci_alloc_irq_vectors(pdev, 2, STMMAC_MSI_VEC_MAX, > + PCI_IRQ_MSI | PCI_IRQ_MSIX); > + if (ret < 0) { > + dev_info(&pdev->dev, "%s: multi MSI enablement failed\n", > + __func__); > + return ret; > + } > + > + if (plat->msi_rx_base_vec >= STMMAC_MSI_VEC_MAX || > + plat->msi_tx_base_vec >= STMMAC_MSI_VEC_MAX) { > + dev_info(&pdev->dev, "%s: Invalid RX & TX vector defined\n", > + __func__); > + return -1; free_irq_vectors? Or move the check before alloc if possible. > + } > @@ -699,6 +786,19 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, > writel(tx_lpi_usec, res.addr + GMAC_1US_TIC_COUNTER); > } > > + ret = stmmac_config_multi_msi(pdev, plat, &res); > + if (!ret) > + goto msi_done; Please don't use gotos where an if statement would do perfectly well. > + ret = stmmac_config_single_msi(pdev, plat, &res); > + if (ret) { > + dev_err(&pdev->dev, "%s: ERROR: failed to enable IRQ\n", > + __func__); > + return ret; return? isn't there some cleanup that needs to happen before exiting? > + } > + > +msi_done: > + > ret = stmmac_dvr_probe(&pdev->dev, plat, &res); > if (ret) { > pci_free_irq_vectors(pdev);