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[23.128.96.18]) by mx.google.com with ESMTP id a19si15286813ejt.403.2021.03.16.21.32.01; Tue, 16 Mar 2021 21:32:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@ti.com header.s=ti-com-17Q1 header.b=dH3BiB8O; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229657AbhCQEax (ORCPT + 99 others); Wed, 17 Mar 2021 00:30:53 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:46710 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229526AbhCQEaZ (ORCPT ); Wed, 17 Mar 2021 00:30:25 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12H4UKRO109413; Tue, 16 Mar 2021 23:30:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615955420; bh=CSN65detG9Hwd0KjalhHCI/ZkEfkTmsZlmWpPqTr8Lw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=dH3BiB8O725mPNr1JjkaTu9cpy845RJc681LSSdksRrxw2yp/uomeUkA6K0p5si9N 6Ve1muETAwjKIPe3dj30iuRudX7NH8EZhIZu1C2X3g7ZFw0v0EezWtCrhWGNC5Ruxo vtvloMSePyqku58astK+6CURTWUn8+7P0dxbhj6I= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12H4UKJv104826 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 16 Mar 2021 23:30:20 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 16 Mar 2021 23:30:20 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 16 Mar 2021 23:30:20 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12H4U8bv072628; Tue, 16 Mar 2021 23:30:17 -0500 From: Aswath Govindraju CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Aswath Govindraju , Nishanth Menon , Tero Kristo , Rob Herring , , , Subject: [PATCH v3 2/2] arm64: dts: ti: k3-am642-evm: Add USB support Date: Wed, 17 Mar 2021 10:00:06 +0530 Message-ID: <20210317043007.18272-3-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210317043007.18272-1-a-govindraju@ti.com> References: <20210317043007.18272-1-a-govindraju@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is connected with a resistor divider in between. USB0_DRVVBUS pin is muxed between USB0_DRVVBUS and GPIO1_79 signals. Add the corresponding properties and set the pinmux mode for USB subsystem in the evm dts file. Signed-off-by: Aswath Govindraju Acked-by: Roger Quadros --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 25fa6fbc0619..1365e3164294 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -210,6 +210,12 @@ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ >; }; + + main_usb0_pins_default: main-usb0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ + >; + }; }; &main_uart0 { @@ -335,6 +341,18 @@ disable-wp; }; +&usbss0 { + ti,vbus-divider; + ti,usb2-only; +}; + +&usb0 { + dr_mode = "otg"; + maximum-speed = "high-speed"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb0_pins_default>; +}; + &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&mdio1_pins_default -- 2.17.1