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From:   Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date:   Wed, 17 Mar 2021 23:34:38 +0800
Message-ID: <CAAOTY_8pt5Vm9Xjy-c4kLV0qcmVJQp4Pj2=gokrnuGrdrYD7Nw@mail.gmail.com>
Subject: Re: [RESEND,v4,1/2] drm/mediatek: mtk_dpi: Add check for max clock
 rate in mode_valid
To:     Rex-BC Chen <rex-bc.chen@mediatek.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        DTML <devicetree@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Pi-Hsun Shih <pihsun@chromium.org>,
        Jitao Shi <jitao.shi@mediatek.com>
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Hi, Rex:

Rex-BC Chen <rex-bc.chen@mediatek.com> =E6=96=BC 2021=E5=B9=B43=E6=9C=8816=
=E6=97=A5 =E9=80=B1=E4=BA=8C =E4=B8=8A=E5=8D=8811:26=E5=AF=AB=E9=81=93=EF=
=BC=9A
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
>
> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediate=
k/mtk_dpi.c
> index b05f900d9322..e1945d4bd7c4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
>  struct mtk_dpi_conf {
>         unsigned int (*cal_factor)(int clock);
>         u32 reg_h_fre_con;
> +       u32 max_clock_khz;
>         bool edge_sel_en;
>  };
>
> @@ -557,9 +558,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge =
*bridge)
>         mtk_dpi_set_display_mode(dpi, &dpi->mode);
>  }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> +                         const struct drm_display_mode *mode)
> +{
> +       struct mtk_dpi *dpi =3D bridge_to_dpi(bridge);
> +
> +       if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_cloc=
k_khz)
> +               return MODE_CLOCK_HIGH;
> +
> +       return MODE_OK;
> +}
> +
>  static const struct drm_bridge_funcs mtk_dpi_bridge_funcs =3D {
>         .attach =3D mtk_dpi_bridge_attach,
>         .mode_set =3D mtk_dpi_bridge_mode_set,
> +       .mode_valid =3D mtk_dpi_bridge_mode_valid,

Build error:

../drivers/gpu/drm/mediatek/mtk_dpi.c:576:16: error: initialization
from incompatible pointer type [-Werror=3Dincompatible-pointer-types]
  .mode_valid =3D mtk_dpi_bridge_mode_valid,
                ^~~~~~~~~~~~~~~~~~~~~~~~~

Please remove my 'Reviewed-by' tag.

Regards,
Chun-Kuang.

>         .disable =3D mtk_dpi_bridge_disable,
>         .enable =3D mtk_dpi_bridge_enable,
>  };
> @@ -668,17 +682,20 @@ static unsigned int mt8183_calculate_factor(int clo=
ck)
>  static const struct mtk_dpi_conf mt8173_conf =3D {
>         .cal_factor =3D mt8173_calculate_factor,
>         .reg_h_fre_con =3D 0xe0,
> +       .max_clock_khz =3D 300000,
>  };
>
>  static const struct mtk_dpi_conf mt2701_conf =3D {
>         .cal_factor =3D mt2701_calculate_factor,
>         .reg_h_fre_con =3D 0xb0,
>         .edge_sel_en =3D true,
> +       .max_clock_khz =3D 150000,
>  };
>
>  static const struct mtk_dpi_conf mt8183_conf =3D {
>         .cal_factor =3D mt8183_calculate_factor,
>         .reg_h_fre_con =3D 0xe0,
> +       .max_clock_khz =3D 100000,
>  };
>
>  static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.18.0
>