Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Wed, 17 Mar 2021 14:17:14 +0000
In-Reply-To: <20210317141714.383046-1-qperret@google.com>
Message-Id: <20210317141714.383046-3-qperret@google.com>
Mime-Version: 1.0
References: <20210315143536.214621-34-qperret@google.com> <20210317141714.383046-1-qperret@google.com>
Subject: [PATCH 2/2] KVM: arm64: Disable FWB in host stage-2
From:   Quentin Perret <qperret@google.com>
To:     qperret@google.com
Cc:     catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
        james.morse@arm.com, julien.thierry.kdev@gmail.com,
        suzuki.poulose@arm.com, android-kvm@google.com, seanjc@google.com,
        linux-kernel@vger.kernel.org, robh+dt@kernel.org,
        linux-arm-kernel@lists.infradead.org, kernel-team@android.com,
        kvmarm@lists.cs.columbia.edu, tabba@google.com, ardb@kernel.org,
        mark.rutland@arm.com, dbrazdil@google.com, mate.toth-pal@arm.com
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

We need the host to be in control of cacheability of its own mappings,
so let's disable FWB altogether in its stage 2.

Signed-off-by: Quentin Perret <qperret@google.com>

---

Obviously this will have to be folded in the relevant patch for v6, but
I kept it separate for the sake of review.
---
 arch/arm64/kvm/hyp/nvhe/mem_protect.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c
index dd03252b9574..c472c3becf40 100644
--- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c
+++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c
@@ -94,8 +94,8 @@ int kvm_host_prepare_stage2(void *mem_pgt_pool, void *dev_pgt_pool)
 	if (ret)
 		return ret;
 
-	ret = kvm_pgtable_stage2_init(&host_kvm.pgt, &host_kvm.arch,
-				      &host_kvm.mm_ops);
+	ret = kvm_pgtable_stage2_init_flags(&host_kvm.pgt, &host_kvm.arch,
+					    &host_kvm.mm_ops, KVM_PGTABLE_S2_NOFWB);
 	if (ret)
 		return ret;
 
@@ -116,8 +116,6 @@ int __pkvm_prot_finalize(void)
 	params->vttbr = kvm_get_vttbr(mmu);
 	params->vtcr = host_kvm.arch.vtcr;
 	params->hcr_el2 |= HCR_VM;
-	if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
-		params->hcr_el2 |= HCR_FWB;
 	kvm_flush_dcache_to_poc(params, sizeof(*params));
 
 	write_sysreg(params->hcr_el2, hcr_el2);
-- 
2.31.0.rc2.261.g7f71774620-goog