Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp561338pxf; Wed, 17 Mar 2021 10:30:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy6BXUg4bu3a34MsVhev2RgB9RL02k+8F6fVffyy3hhBU79EGOWRTAjHMBTF20I7IpzQlBT X-Received: by 2002:a17:906:aad5:: with SMTP id kt21mr10682162ejb.160.1616002236121; Wed, 17 Mar 2021 10:30:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616002236; cv=none; d=google.com; s=arc-20160816; b=tF8UTVD/JW9blHs1OBszyhLDFnwVVNsRDYdkCosZts5yDkRKe47jsSI1N6x4hlb1a8 SG2QhSGcqyw4nuozAvvE/OfXEYSbNxEUZGryKY1Rpz+bxaT5JrTs/hh2nebPLCaULtHv LljpSkGqUmMKatdx+rz+3uarW4khKaRk7ZDZc8hFhHPBAZYU8lHHjj9KmpJ0rKsofkvY CU3CjZHdbK5pTfLZiHBcnrZlkO9RaOnbONRpxhF3cIWQyarhpyHFNpl0lBz3mDjengBf TRJRyDKWDznY5YNF/TcSR5vVLpWDsQTqr7lHY5JXFeuquRaDAbeqAaomuUUP4VqvNslq IytQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date; bh=chKKQNpRz46LZ5RidN4ql+P5DJDL3fGAGSVCJWlxKp0=; b=uzHN4SfEy0cRi2IZprjxztHY3HkHkMhk7PBuu5BT/QV4jXn3/DOy4Lt70W8NfuFiFu xM9X7rBmyqfwgWz6ZrIuzGhutJDOXkxrLmscJT0sXEVLeXX11PRvsnCi5hg9iWOTMDce XTvxhfNABsGnRpCyX/TBWa+usimFElRJT7mdJCvtDLu0Zlh2IeKhjV68ROEK4ZAfvh/Y Cp0NJa0DgkrOKCH0r9Z/xzuU2vaZelWE5RXTJGmqoRPf6bm+YFNfprmlZs10fTpFRjmq VZvx1OztEdeSrpSxNHa6QSXeMvLnssV2PnHtR+zdG1ARN+ku0Qca5bV1x894g9Ut7QW4 2b8A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dn18si15539513ejc.590.2021.03.17.10.30.12; Wed, 17 Mar 2021 10:30:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232278AbhCQRV6 convert rfc822-to-8bit (ORCPT + 99 others); Wed, 17 Mar 2021 13:21:58 -0400 Received: from mslow2.mail.gandi.net ([217.70.178.242]:33553 "EHLO mslow2.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232412AbhCQRUi (ORCPT ); Wed, 17 Mar 2021 13:20:38 -0400 Received: from relay4-d.mail.gandi.net (unknown [217.70.183.196]) by mslow2.mail.gandi.net (Postfix) with ESMTP id 766F13A79FA; Wed, 17 Mar 2021 14:54:45 +0000 (UTC) X-Originating-IP: 90.89.138.59 Received: from xps13 (lfbn-tou-1-1325-59.w90-89.abo.wanadoo.fr [90.89.138.59]) (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id C6743E0007; Wed, 17 Mar 2021 14:51:22 +0000 (UTC) Date: Wed, 17 Mar 2021 15:51:21 +0100 From: Miquel Raynal To: Manivannan Sadhasivam Cc: richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, boris.brezillon@collabora.com, Daniele.Palmas@telit.com, bjorn.andersson@linaro.org Subject: Re: [PATCH v5 0/3] Add support for secure regions in NAND Message-ID: <20210317155121.19cbb50c@xps13> In-Reply-To: <20210317122513.42369-1-manivannan.sadhasivam@linaro.org> References: <20210317122513.42369-1-manivannan.sadhasivam@linaro.org> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Manivannan, Manivannan Sadhasivam wrote on Wed, 17 Mar 2021 17:55:10 +0530: > On a typical end product, a vendor may choose to secure some regions in > the NAND memory which are supposed to stay intact between FW upgrades. > The access to those regions will be blocked by a secure element like > Trustzone. So the normal world software like Linux kernel should not > touch these regions (including reading). > > So this series adds a property for declaring such secure regions in DT > so that the driver can skip touching them. While at it, the Qcom NANDc > DT binding is also converted to YAML format. > > Thanks, > Mani > > Changes in v5: > > * Switched to "uint64-matrix" as suggested by Rob > * Moved the whole logic from qcom driver to nand core as suggested by Boris I'm really thinking about a nand-wide property now. Do you think it makes sense to move the helper to the NAND core (instead of the raw NAND core)? I'm fine only using it in the raw NAND core though. Also, can I request a global s/sec/secure/ update? I find the "sec" abbreviation unclear and I think we have more than enough cryptic names :-) Thanks, Miquèl