Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp523606pxf; Thu, 18 Mar 2021 06:23:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwOd7hFWb/oBJFbAVnVlaypttvSvpxK88WfzG5sh+onhLwY74TI5CQ337p3iZ2/RQpS2YIC X-Received: by 2002:a05:6402:3595:: with SMTP id y21mr3588113edc.233.1616073826770; Thu, 18 Mar 2021 06:23:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616073826; cv=none; d=google.com; s=arc-20160816; b=bBempwzxVgYgC+IPbCGMCDZIPCgZl+Guk8zcxekkYzBBQwL9GoyQ+mL98xuNzQw1XC 7BSDhWXnIRAjJo1XrDSS29IMJMVw66V7Fd0xSAr1J29Tjwnc7DqwSUASJi53PDtPFG3U /NHQWqiUd/OmKC9dJvL0rL7wzBClDfNZGKzw8pyQSPzwV/sJKV2KegvI9RuXJ5Nq4c8h 17nkBNsk0uNnxN7qEK9qLoxbt3dKwpbO/6z6NGSFLTH12RBNHRyv9Q0qf6GP9njPFf5y 8m8QYV0SH22aLa2UOqDsEsBfb6dkRaB0iotC4aahIaLWI3WSbGs7l/TG6ZYqjiZippUI vAQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=u3NeDK9cY5+LScrQGMuNmPEicch+nEKRAZTvrU5rPa8=; b=N2p6oKQxpjCpjGX30Op4UcHPcF+bpug3w+UcGOjkg10JtnFuGuhTIZ/WrTSzSIX/Ib Qmc0Qy89XSQrOMqMH01JJWdoKzy3wPfj5jcvuDqepWTQTXzD86ROGhdqu8sGp+4Vl3/0 f0UDSciMbCvLNsjXDlKg12XnN7pajYJIKgt6m6F36GKIn1aVV0sLZXTw6UZNt2Hxnmjn ci+7TXoxoB8mV63jKibxbVf2K+oTXUwtAuD2UeDMhgzKxvcTO2j03e/d77fVakEhooJn 7KYCjPJIjaHYoXvmQkjN2+88o8r87rO5iPGdcCsmEMfYyDfadmFSnO0eu1T2YHx3QB/F aszg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=f7+oHsjU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f2si1588726edn.109.2021.03.18.06.23.22; Thu, 18 Mar 2021 06:23:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=f7+oHsjU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230204AbhCRNWV (ORCPT + 99 others); Thu, 18 Mar 2021 09:22:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:60100 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231201AbhCRNV4 (ORCPT ); Thu, 18 Mar 2021 09:21:56 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id A94DF64EF6; Thu, 18 Mar 2021 13:21:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1616073715; bh=EzRZfMoErI7SpOr28oczHPC/NPJ0PuQ4sfKgbL99TPM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=f7+oHsjUfHF8z9IIXqF2nSRJwwX1GEhdA6EOxzs+LQJ7kxYo1EIbc28Oajx7uHR9v 8FH8KEvEavNNJ5dnx4UjEdBlbwYiIXebWT+Bb+5SVSCiEtcUzMviItLLCGiuXFHw4T de6nXjdkAg7ple498WPlGcQTmnaXBD2FEH9+g4D+oPyT9efgA8JK6ex5o36bguVCV+ QzYF/dZB6J4YgwsO8QoyJCm99qmdPMelM6VhYFn/UZ/cLNo0Z1YW3xVT+EuJkjbsiv r44v3nu40PVwmjqJKpd/JdNfzIyobKahQoBxx6HolG3zCm5GqMAEgroC/RAafcseKU gXKt9Es9NZxig== Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id 7F4C440647; Thu, 18 Mar 2021 10:21:53 -0300 (-03) Date: Thu, 18 Mar 2021 10:21:53 -0300 From: Arnaldo Carvalho de Melo To: Jiri Olsa , Mark Rutland Cc: "Jin, Yao" , jolsa@kernel.org, peterz@infradead.org, mingo@redhat.com, alexander.shishkin@linux.intel.com, Linux-kernel@vger.kernel.org, ak@linux.intel.com, kan.liang@intel.com, yao.jin@intel.com Subject: Re: [PATCH v2 11/27] perf parse-events: Support hardware events inside PMU Message-ID: References: <65624432-2752-8381-d299-9b48ec508406@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Url: http://acmel.wordpress.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Em Thu, Mar 18, 2021 at 01:16:37PM +0100, Jiri Olsa escreveu: > On Wed, Mar 17, 2021 at 10:42:45AM -0300, Arnaldo Carvalho de Melo wrote: > > Em Wed, Mar 17, 2021 at 08:17:52PM +0800, Jin, Yao escreveu: > > > I'm OK to only support 'cpu_core/cpu-cycles/' or 'cpu_atom/cpu-cycles/'. But > > > what would we do for cache event? > > > 'perf stat -e LLC-loads' is OK, but 'perf stat -e cpu/LLC-loads/' is not supported currently. > > > For hybrid platform, user may only want to enable the LLC-loads on core CPUs > > > or on atom CPUs. That's reasonable. While if we don't support the pmu style > > > event, how to satisfy this requirement? > > > If we can support the pmu style event, we can also use the same way for > > > cpu_core/cycles/. At least it's not a bad thing, right? :) > > While we're discussing, do we really want to use the "core" and "atom" > > terms here? I thought cpu/cycles/ would be ok for the main (Big) CPU and > > that we should come up with some short name for the "litle" CPUs. > > Won't we have the same situation with ARM where we want to know the > > number of cycles spent on a BIG core and also on a little one? > > Perhaps 'cycles' should mean all cycles, and then we use 'big/cycles/' and > > 'little/cycles/'? > do arm servers already export multiple pmus like this? > I did not notice I haven't checked, but AFAIK this BIG/Little kind of arch started there, Mark? - Arnaldo > it'd be definitely great to have some unite way for this, > so far we have the hybrid pmu detection and support in > hw events like cycles/instructions.. which should be easy > to follow on arm > > there's also support to have these events on specific pmu > pmu/cycles/ , which I still need to check on