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[23.128.96.18]) by mx.google.com with ESMTP id yj16si3136029ejb.413.2021.03.18.19.36.46; Thu, 18 Mar 2021 19:37:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231854AbhCSCfU (ORCPT + 99 others); Thu, 18 Mar 2021 22:35:20 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:59389 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231475AbhCSCeu (ORCPT ); Thu, 18 Mar 2021 22:34:50 -0400 X-UUID: 1c41936701154981a2103db6bd4cb884-20210319 X-UUID: 1c41936701154981a2103db6bd4cb884-20210319 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1092837910; Fri, 19 Mar 2021 10:34:45 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 19 Mar 2021 10:34:42 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 19 Mar 2021 10:34:42 +0800 From: Seiya Wang To: Rob Herring , Matthias Brugger CC: Jonathan Cameron , Lars-Peter Clausen , Peter Meerwald-Stadler , Ulf Hansson , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Enric Balletbo i Serra , Hsin-Yi Wang , Seiya Wang , Fabien Parent , Sean Wang , Zhiyong Tao , Chaotian Jing , Wenbin Mei , Stanley Chu , , , , , , , , , Subject: [PATCH v2 0/8] Add basic node support for Mediatek MT8195 SoC Date: Fri, 19 Mar 2021 10:34:18 +0800 Message-ID: <20210319023427.16711-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 369FE48044719369D9DCA15B0B2E3408B975033CEE214468D66328468C1E5DBE2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT8195 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA55 and 4 CA78 cores. MT8195 share many HW IP with MT65xx series. This patchset was tested on MT8195 evaluation board to shell. Based on next-20210318 Changes in v2 Fix make dt_binding_check warning in mediatek,ufs-phy.yaml Update usb phy and ufs phy nodes in mt8195.dtsi Seiya Wang (8): dt-bindings: timer: Add compatible for Mediatek MT8195 dt-bindings: serial: Add compatible for Mediatek MT8195 dt-bindings: watchdog: Add compatible for Mediatek MT8195 dt-bindings: mmc: Add compatible for Mediatek MT8195 dt-bindings: iio: adc: Add compatible for Mediatek MT8195 dt-bindings: arm: Add compatible for Mediatek MT8195 dt-bindings: phy: fix dt_binding_check warning in mediatek,ufs-phy.yaml arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile .../devicetree/bindings/arm/mediatek.yaml | 4 + .../bindings/iio/adc/mediatek,mt2701-auxadc.yaml | 1 + Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 1 + .../devicetree/bindings/phy/mediatek,ufs-phy.yaml | 8 +- .../devicetree/bindings/serial/mtk-uart.txt | 1 + .../bindings/timer/mediatek,mtk-timer.txt | 1 + .../devicetree/bindings/watchdog/mtk-wdt.txt | 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8195-evb.dts | 29 ++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 464 +++++++++++++++++++++ 10 files changed, 509 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi -- 2.14.1