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[23.128.96.18]) by mx.google.com with ESMTP id jp24si4968676ejb.512.2021.03.19.11.23.58; Fri, 19 Mar 2021 11:24:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230226AbhCSSWw (ORCPT + 99 others); Fri, 19 Mar 2021 14:22:52 -0400 Received: from mga05.intel.com ([192.55.52.43]:44025 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230186AbhCSSWa (ORCPT ); Fri, 19 Mar 2021 14:22:30 -0400 IronPort-SDR: 8bAKtSDQMGKz5EY2kQ3zPL7dDXGrHXC+ZCXPM/O1k+ehu5z6tqaPNZSbscIS1zbrjAtMfomyd+ Eux3upZRQdvg== X-IronPort-AV: E=McAfee;i="6000,8403,9928"; a="275015753" X-IronPort-AV: E=Sophos;i="5.81,262,1610438400"; d="scan'208";a="275015753" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2021 11:22:30 -0700 IronPort-SDR: OXb4ZlJdEYHKk0QQ+oNIDdm9cVzvDrYXRqrfD6npsWMuwEkO7NgO7LsXNCCR8H2rsU1KRq4GQM +USaTqo26cqw== X-IronPort-AV: E=Sophos;i="5.81,262,1610438400"; d="scan'208";a="406896980" Received: from hyunyi-mobl1.amr.corp.intel.com (HELO [10.212.50.74]) ([10.212.50.74]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2021 11:22:29 -0700 Subject: Re: [PATCH v1 1/1] x86/tdx: Add tdcall() and tdvmcall() helper functions To: "Kuppuswamy, Sathyanarayanan" , Sean Christopherson Cc: Peter Zijlstra , Andy Lutomirski , Andi Kleen , Kirill Shutemov , Kuppuswamy Sathyanarayanan , Dan Williams , Raj Ashok , linux-kernel@vger.kernel.org References: <0A886D87-1979-419C-86DE-EA2FABDFF3EB@amacapital.net> <20210318213053.203403-1-sathyanarayanan.kuppuswamy@linux.intel.com> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/19/21 10:42 AM, Kuppuswamy, Sathyanarayanan wrote: >>> @@ -4,6 +4,58 @@ >>>   #include >>>   #include >>>   +void tdcall(u64 leafid, struct tdcall_regs *regs) >>> +{ >>> +    asm volatile( >>> +            /* RAX = leafid (TDCALL LEAF ID) */ >>> +            "  movq %0, %%rax;" >>> +            /* Move regs->r[*] data to regs r[a-c]x,  r8-r5 */ >>> +            "  movq 8(%1), %%rcx;" >> >> I am super duper opposed to using inline asm. Large blocks are >> hard to read, > I think this point is arguable. Based on the review comments I > received so far, people prefer inline assembly compared to asm sub > functions. It's arguable, but Sean makes a pretty compelling case. I actually think inline assembly is a monstrosity. It's insanely arcane and, as I hope you have noted, does not scale nicely beyond one or two instructions. >> and even harder to maintain. E.g. the %1 usage falls apart if an >> output constraint is added; that can be avoided by defining a local >> const/imm (I forget what they're called), but it doesn't help >> readability. > we can use OFFSET() calls to improve the readability and avoid this > issue. Also IMO, any one adding constraints should know how this > would affect the asm code. This is about *maintainability*. How _easily_ can someone change this code in the future? Sean's arguing that it's *hard* to correctly add a constraint. Unfortunately, our supply of omnipotent kernel developers is a bit short. >>> +            "  movq 16(%1), %%rdx;" >>> +            "  movq 24(%1), %%r8;" >>> +            "  movq 32(%1), %%r9;" >>> +            "  movq 40(%1), %%r10;" >>> +            "  movq 48(%1), %%r11;" >>> +            "  movq 56(%1), %%r12;" >>> +            "  movq 64(%1), %%r13;" >>> +            "  movq 72(%1), %%r14;" >>> +            "  movq 80(%1), %%r15;" >> >> This is extremely unsafe, and wasteful. Putting the onus on the >> caller to zero out unused registers, with no mechanism to >> enforce/encourage doing so, > For encouragement, we can add a comment to this function about > callers responsibility. makes it >> likely that the kernel will leak information to the VMM, e.g. in >> the form of stack data due to a partially initialized "regs". > Unless you create sub-functions for each use cases, callers cannot > avoid this responsibility. I don't think we're quite at the point where we throw up our hands. It would be pretty simple to have an initializer that zeros the registers out, or looks at the argument mask and does it more precisely. Surely we can do *something*. >>     /* Offset for fields in tdvmcall_output */ >>     OFFSET(TDVMCALL_r12, tdvmcall_output, r13); >>     OFFSET(TDVMCALL_r13, tdvmcall_output, r13); >>     OFFSET(TDVMCALL_r14, tdvmcall_output, r14); >>     OFFSET(TDVMCALL_r15, tdvmcall_output, r15); >> >> SYM_FUNC_START(__tdvmcall) >>     FRAME_BEGIN >> >>     /* Save/restore non-volatile GPRs that are exposed to the VMM. */ >>          push %r15 >>          push %r14 >>          push %r13 >>          push %r12 I might have some tweaks for the assembly once someone puts a real patch together. But, that looks a lot more sane than the inline assembly to me.