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From:   Thomas Gleixner <tglx@linutronix.de>
To:     "Chang S. Bae" <chang.seok.bae@intel.com>, bp@suse.de,
        luto@kernel.org, mingo@kernel.org, x86@kernel.org
Cc:     len.brown@intel.com, dave.hansen@intel.com, jing2.liu@intel.com,
        ravi.v.shankar@intel.com, linux-kernel@vger.kernel.org,
        chang.seok.bae@intel.com
Subject: Re: [PATCH v4 14/22] x86/fpu/xstate: Expand the xstate buffer on the first use of dynamic user state
In-Reply-To: <20210221185637.19281-15-chang.seok.bae@intel.com>
References: <20210221185637.19281-1-chang.seok.bae@intel.com> <20210221185637.19281-15-chang.seok.bae@intel.com>
Date:   Sat, 20 Mar 2021 23:13:29 +0100
Message-ID: <87o8fda2ye.fsf@nanos.tec.linutronix.de>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

On Sun, Feb 21 2021 at 10:56, Chang S. Bae wrote:
> +
> +/* Update MSR IA32_XFD with xfirstuse_not_detected() if needed. */
> +static inline void xdisable_switch(struct fpu *prev, struct fpu *next)
> +{
> +	if (!static_cpu_has(X86_FEATURE_XFD) || !xfirstuse_enabled())
> +		return;
> +
> +	if (unlikely(prev->state_mask != next->state_mask))
> +		xdisable_setbits(xfirstuse_not_detected(next));
> +}

So this is invoked on context switch. Toggling bit 18 of MSR_IA32_XFD
when it does not match. The spec document says:

  "System software may disable use of Intel AMX by clearing XCR0[18:17], by
   clearing CR4.OSXSAVE, or by setting IA32_XFD[18]. It is recommended that
   system software initialize AMX state (e.g., by executing TILERELEASE)
   before doing so. This is because maintaining AMX state in a
   non-initialized state may have negative power and performance
   implications."

I'm not seeing anything related to this. Is this a recommendation
which can be ignored or is that going to be duct taped into the code
base once the first user complains about slowdowns of their non AMX
workloads on that machine?

Thanks,

        tglx