Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp3189819pxf; Sun, 21 Mar 2021 23:15:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyW9k8fk67RjP2POfo6GchwLeEPHqmMQ42qXLZVi3POQhTbNIE6SI7cTt65UwsBxFGnQWLk X-Received: by 2002:a05:6402:1545:: with SMTP id p5mr23628608edx.155.1616393750924; Sun, 21 Mar 2021 23:15:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616393750; cv=none; d=google.com; s=arc-20160816; b=0J3m12cBVsLRkAgY38WLCWY6fvoXOQq0nzjVs9LVar22w9CEsRQTRJqTB65fh6LVKC 7iecawPxRWs9guvTJ+Yqt/B/9nqgsNXpprL1Ve7Ehlp8TyaX+++YbfEzUazbobBdkIbJ Y9nJq1/N0DfSQ+DjVKlEKDIWaA2siYGsV5NImrkxCdUJy9hzf1dM3vxPxKPRDGU62SXW LiVYNDgH9bOKP48Kbc55Zp5sspcW8usM/yGFaCEP5xf54fRnk2O7fk86ZQuVWCTjG9oe xLO/bVUjQKZbkhDxqjv/vkBn9zGENOOm7a7SJiRM02rYFUk/HtGs0VM97Ag4gjjUbIg4 jeFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :ironport-sdr:ironport-sdr; bh=4y4pg72RDssCmyFvrmYVuLZqr4l2V21s7yNNo4MYBds=; b=ai+QnoWRPVIApnrb6QZj0yyXAyYDrz+ElYlsdRV7hAywtp5NAxnXa9hJHVEvKKl5hF UusQA/6uBnbm3kc+/FXUnCix0aEn8uaVe8qfWq+g7EvdYFM47by2CguU1zkjcptgTMZ/ Us6FqLxqiw51b3oATqtyRWF2+FY+VNi460l+9qVOQzb06XzrBoRv9YUgshCN8O9aavHA Ctv2W5Q0HoH9N7h2ddGhhQVjh3Qf51hh6K4GkD65jl8J2dZ9bDQPqsTDNr4VYn6GFSNY 5F8WvX2RTRK50JuqFn23OZURkPQuQieeCfbh+HS3YJOEEYp9HqKfkeUX6D2r3entFZf2 mwag== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z7si11562677ede.30.2021.03.21.23.15.29; Sun, 21 Mar 2021 23:15:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229912AbhCVGOm (ORCPT + 99 others); Mon, 22 Mar 2021 02:14:42 -0400 Received: from mga11.intel.com ([192.55.52.93]:15223 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229854AbhCVGOT (ORCPT ); Mon, 22 Mar 2021 02:14:19 -0400 IronPort-SDR: kOP/yyvGIzphAP1eowPVr59mShALZnzq/6mBBYHIPRRq3mensst0+SO2z8UgrOYPZfcJpYKc/0 PPTs/VywwRzg== X-IronPort-AV: E=McAfee;i="6000,8403,9930"; a="186889252" X-IronPort-AV: E=Sophos;i="5.81,268,1610438400"; d="scan'208";a="186889252" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2021 23:14:19 -0700 IronPort-SDR: NVJVdcPeq3P7P7J7HvAupgnGv5EAPpqB3IH/a12aqPnDbLSNSC2HbMwxcUCp+Jk3A+seuMRHlY 2pRXX1eH0mkg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,268,1610438400"; d="scan'208";a="441026269" Received: from clx-ap-likexu.sh.intel.com ([10.239.48.108]) by fmsmga002.fm.intel.com with ESMTP; 21 Mar 2021 23:14:16 -0700 From: Like Xu To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Thomas Gleixner , Borislav Petkov , Kan Liang , x86@kernel.org, linux-kernel@vger.kernel.org, Like Xu , Andi Kleen Subject: [PATCH v4 RESEND 2/5] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Date: Mon, 22 Mar 2021 14:06:32 +0800 Message-Id: <20210322060635.821531-3-like.xu@linux.intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210322060635.821531-1-like.xu@linux.intel.com> References: <20210322060635.821531-1-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If the platform supports LBR_INFO register, the x86_pmu.lbr_info will be assigned in intel_pmu_?_lbr_init_?() and it's safe to expose LBR_INFO in the x86_perf_get_lbr() directly, instead of relying on lbr_format check. Also Architectural LBR has IA32_LBR_x_INFO instead of LBR_FORMAT_INFO_x to hold metadata for the operation, including mispredict, TSX, and elapsed cycle time information. Signed-off-by: Like Xu Reviewed-by: Kan Liang Reviewed-by: Andi Kleen --- arch/x86/events/intel/lbr.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 21890dacfcfe..355ea70f1879 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -1832,12 +1832,10 @@ void __init intel_pmu_arch_lbr_init(void) */ int x86_perf_get_lbr(struct x86_pmu_lbr *lbr) { - int lbr_fmt = x86_pmu.intel_cap.lbr_format; - lbr->nr = x86_pmu.lbr_nr; lbr->from = x86_pmu.lbr_from; lbr->to = x86_pmu.lbr_to; - lbr->info = (lbr_fmt == LBR_FORMAT_INFO) ? x86_pmu.lbr_info : 0; + lbr->info = x86_pmu.lbr_info; return 0; } -- 2.29.2