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Subject: Re: [PATCH] microblaze: Fix a typo
To:     Bhaskar Chowdhury <unixbhaskar@gmail.com>,
        linux-kernel@vger.kernel.org
Cc:     rdunlap@infradead.org
References: <20210319045323.21241-1-unixbhaskar@gmail.com>
From:   Michal Simek <monstr@monstr.eu>
Message-ID: <4afbe9f6-4be0-d02f-3c63-899f10c13972@monstr.eu>
Date:   Mon, 22 Mar 2021 09:27:14 +0100
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On 3/19/21 5:53 AM, Bhaskar Chowdhury wrote:
> 
> s/storign/storing/
> 
> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
> ---
>  arch/microblaze/lib/uaccess_old.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/microblaze/lib/uaccess_old.S b/arch/microblaze/lib/uaccess_old.S
> index 0e8cc2710c27..eca290090038 100644
> --- a/arch/microblaze/lib/uaccess_old.S
> +++ b/arch/microblaze/lib/uaccess_old.S
> @@ -188,7 +188,7 @@ w2:	sw	r4, r5, r3
>  	.text
> 
>  .align 4 /* Alignment is important to keep icache happy */
> -page:	/* Create room on stack and save registers for storign values */
> +page:	/* Create room on stack and save registers for storing values */
>  	addik   r1, r1, -40
>  	swi	r5, r1, 0
>  	swi	r6, r1, 4
> --
> 2.26.2
> 

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs