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[23.128.96.18]) by mx.google.com with ESMTP id u13si10706741ejc.243.2021.03.22.01.30.29; Mon, 22 Mar 2021 01:30:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GO6xsfix; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230151AbhCVI1l (ORCPT + 99 others); Mon, 22 Mar 2021 04:27:41 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48756 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229865AbhCVI1Q (ORCPT ); Mon, 22 Mar 2021 04:27:16 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12M8QxH3066698; Mon, 22 Mar 2021 03:26:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1616401619; bh=oqlxDFGonXvP4tV/XAURfQ9JGny2MxY7Ck9WN/YVIKw=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=GO6xsfixOESX66InyqfZyYz01o1rQZa4NofHz9S7X7Ae/fKBAFpUsuGhWP8Jhs5mz qYXZieS/bLCnO2cHNdSNxqeOdrDYh5IlOf42rG9mqT170kbYYPHJe/mtyp8Uq/txFX nTdn81UUaHsyv7CYfeT5Y8H410uwvBp+NF6vYh44= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12M8Qxuu116401 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 22 Mar 2021 03:26:59 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Mon, 22 Mar 2021 03:26:59 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Mon, 22 Mar 2021 03:26:59 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12M8QwKX032960; Mon, 22 Mar 2021 03:26:58 -0500 Date: Mon, 22 Mar 2021 13:56:57 +0530 From: Pratyush Yadav To: Tudor Ambarus CC: , , , , , Subject: Re: [PATCH v3 1/2] mtd: spi-nor: Move Software Write Protection logic out of the core Message-ID: <20210322082655.rfoncl6zeuve73pw@ti.com> References: <20210322075131.45093-1-tudor.ambarus@microchip.com> <20210322075131.45093-2-tudor.ambarus@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20210322075131.45093-2-tudor.ambarus@microchip.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/03/21 09:51AM, Tudor Ambarus wrote: > It makes the core file a bit smaller and provides better separation > between the Software Write Protection features and the core logic. > All the next generic software write protection features (e.g. Individual > Block Protection) will reside in swp.c. > > Signed-off-by: Tudor Ambarus Acked-by: Pratyush Yadav -- Regards, Pratyush Yadav Texas Instruments Inc.