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In-Reply-To: <20210322114826.ahwhbqxjxfg3nmrf@pengutronix.de>
From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Mon, 22 Mar 2021 14:15:08 +0200
Message-ID: <CAHp75Vc6YnHJdt0HhV9AZtpLHLapHZb08O5ygg++PX+u04m--A@mail.gmail.com>
Subject: Re: [PATCH v5 2/7] pwm: pca9685: Support hardware readout
To:     =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= 
        <u.kleine-koenig@pengutronix.de>
Cc:     Thierry Reding <thierry.reding@gmail.com>,
        Clemens Gruber <clemens.gruber@pqgruber.com>,
        Sven Van Asbroeck <thesven73@gmail.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        "linux-pwm@vger.kernel.org" <linux-pwm@vger.kernel.org>
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On Mon, Mar 22, 2021 at 1:48 PM Uwe Kleine-K=C3=B6nig
<u.kleine-koenig@pengutronix.de> wrote:
> On Mon, Mar 22, 2021 at 01:40:57PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 22, 2021 at 1:22 PM Uwe Kleine-K=C3=B6nig
> > <u.kleine-koenig@pengutronix.de> wrote:
> > > On Mon, Mar 22, 2021 at 11:38:40AM +0200, Andy Shevchenko wrote:
> > > > On Monday, March 22, 2021, Thierry Reding <thierry.reding@gmail.com=
> wrote:
> > > > > On Fri, Jan 29, 2021 at 09:37:47PM +0100, Clemens Gruber wrote:
> > > > > > Thierry: Would you accept it if we continue to reset the regist=
ers in
> > > > > > .probe?
> > > > >
> > > > > Yes, I think it's fine to continue to reset the registers since t=
hat's
> > > > > basically what the driver already does. It'd be great if you coul=
d
> > > > > follow up with a patch that removes the reset and leaves the hard=
ware in
> > > > > whatever state the bootloader has set up. Then we can take that p=
atch
> > > > > for a ride and see if there are any complains about it breaking. =
If
> > > > > there are we can always try to fix them, but as a last resort we =
can
> > > > > also revert, which then may be something we have to live with. Bu=
t I
> > > > > think we should at least try to make this consistent with how oth=
er
> > > > > drivers do this so that people don't stumble over this particular
> > > > > driver's
> > > >
> > > > I guess we may miss (a PCB / silicon design flaw or warm boot case)=
 when
> > > > boot loader left device completely untouched and device either in w=
rong
> > > > state because if failed reset (saw this on PCA9555 which has a
> > > > corresponding errata), or simply we have done a warm reset of the s=
ystem.
> > > > So, we also have to understand how to properly exit.
> > >
> > > I don't think that not resetting is a real problem. My argumentation
> > > goes as follows:
> > >
> > > When the PWM driver is loaded and the PWM configuration is invalid, i=
t
> > > was already invalid for the time between power up (or warm start) and
> > > PWM driver load time. Then it doesn't really hurt to keep the PWM
> > > in this invalid state for a little moment longer until the consumer o=
f
> > > the PWM becomes active.
> >
> > But this won't work in the cases when we have a chip with a shared
> > settings for period and/or duty cycle. You will never have a user come
> > due to -EBUSY.
>
> That's wrong, the first consumer to enable the PWM (in software) is
> supposed to be able to change the settings.

If it's a critical PWM, how can you be allowed to do that?
And if so, what is the difference between resetting the device in this
case? You may consider it as a change to the settings by the first
consumer.

--=20
With Best Regards,
Andy Shevchenko