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[23.128.96.18]) by mx.google.com with ESMTP id t5si11908637edd.272.2021.03.22.07.07.07; Mon, 22 Mar 2021 07:07:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230285AbhCVOFX (ORCPT + 99 others); Mon, 22 Mar 2021 10:05:23 -0400 Received: from mail.kernel.org ([198.145.29.99]:47466 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230064AbhCVOEw (ORCPT ); Mon, 22 Mar 2021 10:04:52 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6109E6198E; Mon, 22 Mar 2021 14:04:51 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lOLAn-00351e-8A; Mon, 22 Mar 2021 14:04:49 +0000 Date: Mon, 22 Mar 2021 14:04:48 +0000 Message-ID: <87lfafgu7z.wl-maz@kernel.org> From: Marc Zyngier To: Michal Simek Cc: Lorenzo Pieralisi , michal.simek@xilinx.com, Bjorn Helgaas , Frank Wunderlich , Thierry Reding , Thomas Gleixner , Rob Herring , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Thierry Reding , Jonathan Hunter , Ryder Lee , Marek Vasut , Yoshihiro Shimoda , Paul Walmsley , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH 03/13] PCI: xilinx: Convert to MSI domains In-Reply-To: <74cffc38-df12-7d92-1bfe-20eed4b60e86@monstr.eu> References: <20210225151023.3642391-1-maz@kernel.org> <20210225151023.3642391-4-maz@kernel.org> <20210322122100.GA11469@e121166-lin.cambridge.arm.com> <74cffc38-df12-7d92-1bfe-20eed4b60e86@monstr.eu> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: monstr@monstr.eu, lorenzo.pieralisi@arm.com, michal.simek@xilinx.com, bhelgaas@google.com, frank-w@public-files.de, treding@nvidia.com, tglx@linutronix.de, robh@kernel.org, will@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, sthemmin@microsoft.com, wei.liu@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, ryder.lee@mediatek.com, marek.vasut+renesas@gmail.com, yoshihiro.shimoda.uh@renesas.com, paul.walmsley@sifive.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 22 Mar 2021 12:33:10 +0000, Michal Simek wrote: > > Hi, > > On 3/22/21 1:21 PM, Lorenzo Pieralisi wrote: > > On Thu, Feb 25, 2021 at 03:10:13PM +0000, Marc Zyngier wrote: > >> In anticipation of the removal of the msi_controller structure, convert > >> the ancient xilinx host controller driver to MSI domains. > >> > >> We end-up with the usual two domain structure, the top one being a > >> generic PCI/MSI domain, the bottom one being xilinx-specific and handling > >> the actual HW interrupt allocation. > >> > >> This allows us to fix some of the most appaling MSI programming, where > >> the message programmed in the device is the virtual IRQ number instead > >> of the allocated vector number. The allocator is also made safe with > >> a mutex. This should allow support for MultiMSI, but I decided not to > >> even try, since I cannot test it. > >> > >> Also take the opportunity to get rid of the cargo-culted memory allocation > >> for the MSI capture address. *ANY* sufficiently aligned address should > >> be good enough, so use the physical address of the xilinx_pcie_host > >> structure instead. > >> > >> Signed-off-by: Marc Zyngier > >> --- > >> drivers/pci/controller/Kconfig | 2 +- > >> drivers/pci/controller/pcie-xilinx.c | 238 +++++++++++---------------- > >> 2 files changed, 96 insertions(+), 144 deletions(-) > > > > Michal, > > > > can you please test these changes or make sure someone does and report > > back on the mailing list please ? > > > > I would like to merge this series for v5.13. > > I got just private response (not sure why) from Bharat March 5 that > changes are fine. > It means go ahead with it. Can I take this as a full Tested-by tag? Thanks, M. -- Without deviation from the norm, progress is not possible.