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Mon, 22 Mar 2021 10:34:12 -0700 (PDT) Received: from localhost ([2620:15c:202:1:90a9:b908:f93a:2f78]) by smtp.gmail.com with UTF8SMTPSA id j3sm13644972pfi.74.2021.03.22.10.34.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Mar 2021 10:34:12 -0700 (PDT) Date: Mon, 22 Mar 2021 10:34:10 -0700 From: Matthias Kaehlcke To: skakit@codeaurora.org Cc: Rob Herring , Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kgunda@codeaurora.org Subject: Re: [PATCH] arm64: dts: qcom: sc7280: Add PMIC peripherals for SC7280 Message-ID: References: <1615459229-27573-1-git-send-email-skakit@codeaurora.org> <4dc784eb3c00a9805141148732476838@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <4dc784eb3c00a9805141148732476838@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Satya, On Mon, Mar 22, 2021 at 06:50:47PM +0530, skakit@codeaurora.org wrote: > Hi Matthias, > > On 2021-03-13 02:10, Matthias Kaehlcke wrote: > > Hi Satya, > > > > On Thu, Mar 11, 2021 at 04:10:29PM +0530, satya priya wrote: > > > Add PM7325/PM8350C/PMK8350/PMR735A peripherals such as PON, > > > GPIOs, RTC and other PMIC infra modules for SC7280. > > > > > > Signed-off-by: satya priya > > > --- > > > This patch depends on base DT and board files for SC7280 to merge > > > first > > > https://lore.kernel.org/patchwork/project/lkml/list/?series=487403 > > > > > > arch/arm64/boot/dts/qcom/pm7325.dtsi | 60 ++++++++++++++++++++ > > > arch/arm64/boot/dts/qcom/pm8350c.dtsi | 60 ++++++++++++++++++++ > > > arch/arm64/boot/dts/qcom/pmk8350.dtsi | 104 > > > ++++++++++++++++++++++++++++++++++ > > > arch/arm64/boot/dts/qcom/pmr735a.dtsi | 60 ++++++++++++++++++++ > > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 +++ > > > 5 files changed, 292 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi > > > create mode 100644 arch/arm64/boot/dts/qcom/pm8350c.dtsi > > > create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi > > > create mode 100644 arch/arm64/boot/dts/qcom/pmr735a.dtsi > > > > > > diff --git a/arch/arm64/boot/dts/qcom/pm7325.dtsi > > > b/arch/arm64/boot/dts/qcom/pm7325.dtsi > > > new file mode 100644 > > > index 0000000..393b256 > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/qcom/pm7325.dtsi > > > @@ -0,0 +1,60 @@ > > > > ... > > > > > + polling-delay-passive = <100>; > > > + polling-delay = <0>; > > > > Are you sure that no polling delay is needed? How does the thermal > > framework > > detect that the temperatures is >= the passive trip point and that it > > should > > start polling at 'polling-delay-passive' rate? > > > > As the temp-alarm has interrupt support, whenever preconfigured threshold > violates it notifies thermal framework, so I think the polling delay is not > needed here. From the documentation I found it's not clear to me how exactly these interrupts work. Is a single interrupt triggered when the threshold is violated or are there periodic (?) interrupts as long as the temperature is above the stage 0 threshold? Why is 'polling-delay-passive' passive needed if there are interrupts? Maybe to detect that the zone should transition from passive to no cooling when the temperature drops below the stage 0 threshold?