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Message-ID: <b1f86df8e895304785d73b24d9e7e1aace332502.camel@suse.de>
Subject: Re: [PATCH v3 2/2] arm64: mm: reserve CMA and crashkernel in
 ZONE_DMA32
From:   Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To:     Jon Masters <jcm@jonmasters.org>, catalin.marinas@arm.com,
        linux-kernel@vger.kernel.org
Cc:     Qian Cai <cai@lca.pw>, Will Deacon <will@kernel.org>,
        linux-arm-kernel@lists.infradead.org
Date:   Mon, 22 Mar 2021 19:48:43 +0100
In-Reply-To: <d2cde732-a6d5-65d3-843a-e2f3fe498fde@jonmasters.org>
References: <20191107095611.18429-1-nsaenzjulienne@suse.de>
         <20191107095611.18429-3-nsaenzjulienne@suse.de>
         <4f094513-507d-566d-a0e2-a30ea36f64c9@jonmasters.org>
         <d2cde732-a6d5-65d3-843a-e2f3fe498fde@jonmasters.org>
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On Mon, 2021-03-22 at 14:40 -0400, Jon Masters wrote:
> On 3/22/21 2:34 PM, Jon Masters wrote:
> > Hi Nicolas,
> >=20
> > On 11/7/19 4:56 AM, Nicolas Saenz Julienne wrote:
> > > With the introduction of ZONE_DMA in arm64 we moved the default CMA a=
nd
> > > crashkernel reservation into that area. This caused a regression on b=
ig
> > > machines that need big CMA and crashkernel reservations. Note that
> > > ZONE_DMA is only 1GB big.
> > >=20
> > > Restore the previous behavior as the wide majority of devices are OK
> > > with reserving these in ZONE_DMA32. The ones that need them in ZONE_D=
MA
> > > will configure it explicitly.
> > >=20
> > > Reported-by: Qian Cai <cai@lca.pw>
> > > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> > > ---
> > > =C2=A0 arch/arm64/mm/init.c | 4 ++--
> > > =C2=A0 1 file changed, 2 insertions(+), 2 deletions(-)
> > >=20
> > > diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> > > index 580d1052ac34..8385d3c0733f 100644
> > > --- a/arch/arm64/mm/init.c
> > > +++ b/arch/arm64/mm/init.c
> > > @@ -88,7 +88,7 @@ static void __init reserve_crashkernel(void)
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (crash_base =3D=3D 0) {
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* Current arm=
64 boot protocol requires 2MB alignment */
> > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 crash_base =3D memblock_f=
ind_in_range(0, ARCH_LOW_ADDRESS_LIMIT,
> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 crash_base =3D memblock_f=
ind_in_range(0, arm64_dma32_phys_limit,
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 crash_size, SZ_2M);
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (crash_base=
 =3D=3D 0) {
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 pr_warn("cannot allocate crashkernel (size:0x%llx)\n",
> > > @@ -454,7 +454,7 @@ void __init arm64_memblock_init(void)
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 high_memory =3D __va(memblock_end_of_D=
RAM() - 1) + 1;
> > > -=C2=A0=C2=A0=C2=A0 dma_contiguous_reserve(arm64_dma_phys_limit ? :=
=20
> > > arm64_dma32_phys_limit);
> > > +=C2=A0=C2=A0=C2=A0 dma_contiguous_reserve(arm64_dma32_phys_limit);
> > > =C2=A0 }
> > > =C2=A0 void __init bootmem_init(void)
> >=20
> > Can we get a bit more of a backstory about what the regression was on=
=20
> > larger machines? If the 32-bit DMA region is too small, but the machine=
=20
> > otherwise has plenty of memory, the crashkernel reservation will fail.=
=20
> > Most e.g. enterprise users aren't going to respond to that situation by=
=20
> > determining the placement manually, they'll just not have a crashkernel=
.
>=20
> Nevermind, looks like Catalin already changed this logic in Jan 2021 by=
=20
> removing arm64_dma32_phys_limit and I'm out of date.

Also see this series (already merged):

https://lore.kernel.org/linux-arm-kernel/20201119175400.9995-1-nsaenzjulien=
ne@suse.de/

Regads,
Nicolas


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