Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp4053964pxf; Tue, 23 Mar 2021 01:03:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyVsmiw9RAOhzf4dXo+CGC1iIRdbVlfg5VK0xJh4AnEB79C7KVbWhjnyWceLnS1iLsemVRc X-Received: by 2002:a05:6402:cb8:: with SMTP id cn24mr3385662edb.105.1616486623290; Tue, 23 Mar 2021 01:03:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616486623; cv=none; d=google.com; s=arc-20160816; b=uhC8oxuVWQ6T8A5TMsAxlEolmfSrBDnWOpvVy+VAShNb6kbQ0oXcEtzP9uMUCojuVW WYrpqgoD1xNP27QE9SigIjG6URU6uRx3dFuBuesg+d6vIo6V45xVD3EUiJJIPMIuHn8X IWXoWyTDErDuXdeV5/HH7U7mMxjk6nUC4dY1VZTQPsvpgRBPpBcfehTRXtQ6mO8iTDM+ pmjdWYkViqGX+9t90XuteINDo4iZwHPwn/QBIvVPwtVlG3WGsJUxZwugw/hJ1zhjN/TA +pZwY8obKEJYtFnblvEUaGnLpgVbZ2mnNFNOB0TONn3b3q50tkI86dRwy/gHtPJHt8TI Yrdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=/Ds3JPZ1JcFxhVLcp3b2OmcEyEanxxc5zkVe4PhCBE0=; b=pQwcSNEo2hRolHFwB+pPr/hQ9nY29pB2+yUqhDZfxd2ZWfmUWgA9q1/GX5l2I//fa3 JqsUcMNnRs5eoBaVMNSM21YA24HeKYLnT9RLBxAqjpqFkZfhUGr/Hb9tOyGKeNmoKpc0 p4aRmLNKY1XXr84QMJGSnAGpZIucEPtjR1nHUBbs3e0ojoCMkFbSBYsasyAV38RCrYMx mDZxl69HXutyAzz/SsZG26D4MyjV+yHgCJanY7m3buSE/u5O8MOl4gyfQcrRBsvI3svm qZgOmEHueuB+Kbi36DRmX2Yk1BlYVMZ+gXYGyOlt5yGmhENSnCJbezjnkH954f73TzQs wxdA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t17si13608568ejx.576.2021.03.23.01.03.19; Tue, 23 Mar 2021 01:03:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229592AbhCWICE (ORCPT + 99 others); Tue, 23 Mar 2021 04:02:04 -0400 Received: from out30-130.freemail.mail.aliyun.com ([115.124.30.130]:42681 "EHLO out30-130.freemail.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229448AbhCWIBd (ORCPT ); Tue, 23 Mar 2021 04:01:33 -0400 X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R141e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=e01e04395;MF=jiapeng.chong@linux.alibaba.com;NM=1;PH=DS;RN=7;SR=0;TI=SMTPD_---0UT2X8eb_1616486482; Received: from j63c13417.sqa.eu95.tbsite.net(mailfrom:jiapeng.chong@linux.alibaba.com fp:SMTPD_---0UT2X8eb_1616486482) by smtp.aliyun-inc.com(127.0.0.1); Tue, 23 Mar 2021 16:01:28 +0800 From: Jiapeng Chong To: bskeggs@redhat.com Cc: airlied@linux.ie, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jiapeng Chong Subject: [PATCH] drm/nouveau/mc: make tu102_mc_intr_unarm static Date: Tue, 23 Mar 2021 16:01:21 +0800 Message-Id: <1616486481-94130-1-git-send-email-jiapeng.chong@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix the following sparse warning: drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:74:1: warning: symbol 'tu102_mc_intr_mask' was not declared. Should it be static? drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:62:1: warning: symbol 'tu102_mc_intr_rearm' was not declared. Should it be static? Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c index 58db83e..7cf659cc 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c @@ -58,7 +58,7 @@ struct tu102_mc { spin_unlock_irqrestore(&mc->lock, flags); } -void +static void tu102_mc_intr_rearm(struct nvkm_mc *base) { struct tu102_mc *mc = tu102_mc(base); @@ -70,7 +70,7 @@ struct tu102_mc { spin_unlock_irqrestore(&mc->lock, flags); } -void +static void tu102_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr) { struct tu102_mc *mc = tu102_mc(base); -- 1.8.3.1