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Request the reviewers to go through the patch and let us know if you have a= ny queries with respect to it. - Praveen Kumar Kannoju.=20 -----Original Message----- From: Praveen Kannoju [mailto:praveen.kannoju@oracle.com]=20 Sent: 16 March 2021 06:39 PM To: leon@kernel.org; dledford@redhat.com; jgg@ziepe.ca; linux-rdma@vger.ker= nel.org; linux-kernel@vger.kernel.org Cc: Rajesh Sivaramasubramaniom ; Ram= a Nichanamatlu ; Aruna Ramakrishna ; Jeffery Yoder ; Praveen Kan= noju Subject: [PATCH v2] IB/mlx5: Reduce max order of memory allocated for xlt u= pdate To update xlt (during mlx5_ib_reg_user_mr()), the driver can request up to 1 MB (order-8) memory, depending on the size of the MR. This costly allocat= ion can sometimes take very long to return (a few seconds), especially if t= he system is fragmented and does not have any free chunks for orders >=3D 3= . This causes the calling application to hang for a long time. To avoid the= se long latency spikes, limit max order of allocation to order 3, and reuse= that buffer to populate_xlt() for that MR. This will increase the latency = slightly (in the order of microseconds) for each mlx5_ib_update_xlt() call, especially for larger MRs (since were making mul= tiple calls to populate_xlt()), but its a small price to pay to avoid the l= arge latency spikes with higher order allocations. The flag __GFP_NORETRY i= s used while fetching the free pages to ensure that there are no long compa= ction stalls when the system's memory is in fragmented condition. Signed-off-by: Praveen Kumar Kannoju --- drivers/infiniband/hw/mlx5/mr.c | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/m= r.c index db05b0e..dac19f0 100644 --- a/drivers/infiniband/hw/mlx5/mr.c +++ b/drivers/infiniband/hw/mlx5/mr.c @@ -1004,9 +1004,7 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct i= b_pd *pd, return mr; } =20 -#define MLX5_MAX_UMR_CHUNK ((1 << (MLX5_MAX_UMR_SHIFT + 4)) - \ - MLX5_UMR_MTT_ALIGNMENT) -#define MLX5_SPARE_UMR_CHUNK 0x10000 +#define MLX5_SPARE_UMR_CHUNK 0x8000 =20 /* * Allocate a temporary buffer to hold the per-page information to transfe= r to @@ -1028,30 +1026,16 @@ static void *mlx5_ib_alloc_xlt(size_t *nents, = size_t ent_size, gfp_t gfp_mask) */ might_sleep(); =20 - gfp_mask |=3D __GFP_ZERO; + gfp_mask |=3D __GFP_ZERO | __GFP_NORETRY; =20 - /* - * If the system already has a suitable high order page then just use - * that, but don't try hard to create one. This max is about 1M, so a - * free x86 huge page will satisfy it. - */ size =3D min_t(size_t, ent_size * ALIGN(*nents, xlt_chunk_align), - MLX5_MAX_UMR_CHUNK); + MLX5_SPARE_UMR_CHUNK); *nents =3D size / ent_size; res =3D (void *)__get_free_pages(gfp_mask | __GFP_NOWARN, get_order(size)); if (res) return res; =20 - if (size > MLX5_SPARE_UMR_CHUNK) { - size =3D MLX5_SPARE_UMR_CHUNK; - *nents =3D get_order(size) / ent_size; - res =3D (void *)__get_free_pages(gfp_mask | __GFP_NOWARN, - get_order(size)); - if (res) - return res; - } - *nents =3D PAGE_SIZE / ent_size; res =3D (void *)__get_free_page(gfp_mask); if (res) -- 1.8.3.1