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Tue, 23 Mar 2021 17:57:29 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 23 Mar 2021 17:57:28 +0000 Received: from [172.17.173.69] (172.20.145.6) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1497.2 via Frontend Transport; Tue, 23 Mar 2021 17:57:27 +0000 Subject: Re: GTE - The hardware timestamping engine To: Linus Walleij CC: Kent Gibson , "linux-kernel@vger.kernel.org" , "thierry.reding@gmail.com" , Jon Hunter , "Bartosz Golaszewski" , "open list:GPIO SUBSYSTEM" , linux-tegra , Thomas Gleixner , Arnd Bergmann , "Richard Cochran" References: <4c46726d-fa35-1a95-4295-bca37c8b6fe3@nvidia.com> <20210322060047.GA226745@sol> From: Dipen Patel X-Nvconfidentiality: public Message-ID: <378e2d1b-9b38-605b-c20f-fbfeefb07c6d@nvidia.com> Date: Tue, 23 Mar 2021 11:01:57 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 01886351-f6e1-4842-9772-08d8ee25201b X-MS-TrafficTypeDiagnostic: BL1PR12MB5287: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: CDhSTkrQiNyIlytrCI0f5IMvv3u1SzPMtMrccTA++ICZE0VhD38tRHFQB3mSCqju9nyls4uoHKBJOQlMH1mmrQDVod/udzeVa6yGdBUg4Z1wQxCMuaLFWhVTMimcbyp3VsZ1W8l/IF8kvtPAjhxvMaJyIoIZNVvEvsTPHmLUSIdzK7XApaXYMHexKuT98vRD1r5VrTstUS7Blb/3j6QLB8kle2KyWsgXVCuLsc/TLJ9S/bQGy6fbzg1fh5FNBzBG3Bm6WEnJZtiZYOg772FZgraOF8Yfw37KJOSsjsu/n4hhAJXGDj9RQMQvwGlcSp/Y8TnpMwVwoUO+jOvqP714D3ZAH5WScmGYy0QpLHwBuWvHglF/jeMBZp3WSTB2IrivpdsWUtDmHGM/HJRSNyxULYDga98Ho+8FE6MC9TpEK0dzhvmqBZ+8yRPMWezlJ+3a1whLOaKnf4WT/ViuM5e3Bu5asECamc03U5SsmMN0pokgn4rd3C84hO767VYaDCGYv72ZaZBVzJ2pXKoF6iGLj6vsrkrOzdZVE7L9mXE5NK9oRz2G5xYyYF/TCjcnODcTHy1GNLqQ/I7JKdH/pbqgNjIOxI9OxQCnjaLMzJeTn7Viqij6LNGo1AwGvz0hJQn49unNsBnm/Tc57BEtLQOOTfKzPL6GjLjZKDxCCb5AVOq8/v+oSyeZ1TmwUDUmvkUg X-Forefront-Antispam-Report: CIP:216.228.112.34;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid03.nvidia.com;CAT:NONE;SFS:(4636009)(346002)(39850400004)(396003)(136003)(376002)(46966006)(36840700001)(8936002)(6666004)(7636003)(36906005)(4326008)(7416002)(6916009)(8676002)(336012)(31686004)(36756003)(26005)(54906003)(186003)(2616005)(316002)(36860700001)(70586007)(82310400003)(426003)(5660300002)(70206006)(2906002)(47076005)(86362001)(356005)(16576012)(31696002)(53546011)(82740400003)(478600001)(43740500002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2021 17:57:29.1705 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 01886351-f6e1-4842-9772-08d8ee25201b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT047.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5287 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/23/21 2:08 AM, Linus Walleij wrote: > On Mon, Mar 22, 2021 at 9:17 PM Dipen Patel wrote: > >> My follow-up concerns on both Linus's and Kent's feedback: >> >> 1. Please correct me if I am wrong, lineevent in the gpiolib* is only >> serves the userspace clients. >> 1.a What about kernel drivers wanting to use this feature for monitoring its >> GPIO lines, see gyroscope example somewhere below. In that regards, >> lineevent implementation is not sufficient. >> 1.b Are you also implying to extend lineevent implementation to kernel >> drivers? > > I was talking about lineevent because you mentioned things like > motors and robotics, and those things are traditionally not run in > kernelspace because they are not generic hardware that fit in the > kernel subsystems. > > Normally industrial automatic control tasks are run in a userspace > thread with some realtime priority. > I mentioned those two use cases as illustration purpose as GTE is not just restricted to robotics and vehicles. I agree that those applications run mostly from userspace with RT priority but there most certainly some kernel drivers they interact and it may want to use GTE, for example, BMI088 devices mostly used in drones and robotics, it could be extended to use GTE for its GPIO hw timestamping, GPIO is used to indicate data ready. > As Kent says, in-kernel events are exclusively using IRQ as > mechanism, and should be modeled as IRQs. Then the question > is how you join the timestamp with the IRQ. GPIO chips are > just some kind of irqchip in this regard, we reuse the irqchip > infrastructure in the kernel for all GPIO drivers that generate > "events" in response to state transitions on digital lines. > >>>> And certainly you will also want to use this timestamp for >>>> IIO devices? If it is just GPIOs and IRQs today, it will be >>>> gyroscopes and accelerometers tomorrow, am I right? >>>> >> >> Gyroscope, accelerometers or any IIO are built on top of i2c/spi and/or GPIOs. >> So they are covered as long as they serve as client to GTE framework, For >> example, if gyroscope uses GPIO as an interrupt to indicate frame >> ready, GTE could timestamp that GPIO as well any IRQs like i2c transaction >> complete IRQ. To this to happen, gycroscope then register itself with >> GTE framework and enable required signals that it interfaces/interested with. > > I think there are IIO devices that provide their own > hardware timestamp and as such they might want to use that, > so the mechanism need to be generic enough that a certain > hardware timestamp can be selected sooner or later. > But let's not overcomplicate things for now. > I agree, above BMI088 has its own timestamping engine. I have to look into that aspect for bringing its TS engine into GTE framework as one of the possible off-chip provides besides in-chip GTEs. We can defer that part for later. Thanks for pointing that out. > Yours, > Linus Walleij >