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From:   David Laight <David.Laight@ACULAB.COM>
To:     'Alex Elder' <elder@linaro.org>,
        "davem@davemloft.net" <davem@davemloft.net>,
        "kuba@kernel.org" <kuba@kernel.org>
CC:     "rdunlap@infradead.org" <rdunlap@infradead.org>,
        "bjorn.andersson@linaro.org" <bjorn.andersson@linaro.org>,
        "evgreen@chromium.org" <evgreen@chromium.org>,
        "cpratapa@codeaurora.org" <cpratapa@codeaurora.org>,
        "subashab@codeaurora.org" <subashab@codeaurora.org>,
        "elder@kernel.org" <elder@kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH net-next] net: ipa: avoid 64-bit modulus
Thread-Topic: [PATCH net-next] net: ipa: avoid 64-bit modulus
Thread-Index: AQHXH4CsHuvM6SpiNkO+MERkTuT8kKqTVWfg
Date:   Wed, 24 Mar 2021 16:27:09 +0000
Message-ID: <f77f12f117934e9d9e3b284ed37e87a7@AcuMS.aculab.com>
References: <20210323010505.2149882-1-elder@linaro.org>
In-Reply-To: <20210323010505.2149882-1-elder@linaro.org>
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From: Alex Elder
> Sent: 23 March 2021 01:05
> It is possible for a 32 bit x86 build to use a 64 bit DMA address.
> 
> There are two remaining spots where the IPA driver does a modulo
> operation to check alignment of a DMA address, and under certain
> conditions this can lead to a build error on i386 (at least).
> 
> The alignment checks we're doing are for power-of-2 values, and this
> means the lower 32 bits of the DMA address can be used.  This ensures
> both operands to the modulo operator are 32 bits wide.
> 
> Reported-by: Randy Dunlap <rdunlap@infradead.org>
> Signed-off-by: Alex Elder <elder@linaro.org>
> ---
>  drivers/net/ipa/gsi.c       | 11 +++++++----
>  drivers/net/ipa/ipa_table.c |  9 ++++++---
>  2 files changed, 13 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
> index 7f3e338ca7a72..b6355827bf900 100644
> --- a/drivers/net/ipa/gsi.c
> +++ b/drivers/net/ipa/gsi.c
> @@ -1436,15 +1436,18 @@ static void gsi_evt_ring_rx_update(struct gsi_evt_ring *evt_ring, u32 index)
>  /* Initialize a ring, including allocating DMA memory for its entries */
>  static int gsi_ring_alloc(struct gsi *gsi, struct gsi_ring *ring, u32 count)
>  {
> -	size_t size = count * GSI_RING_ELEMENT_SIZE;
> +	u32 size = count * GSI_RING_ELEMENT_SIZE;
>  	struct device *dev = gsi->dev;
>  	dma_addr_t addr;
> 
> -	/* Hardware requires a 2^n ring size, with alignment equal to size */
> +	/* Hardware requires a 2^n ring size, with alignment equal to size.
> +	 * The size is a power of 2, so we can check alignment using just
> +	 * the bottom 32 bits for a DMA address of any size.
> +	 */
>  	ring->virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL);

Doesn't dma_alloc_coherent() guarantee that alignment?
I doubt anywhere else checks?

	David

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