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 <20210324132841.5841-1-oliver.staebler@bytesatwork.ch>
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From:   Fabio Estevam <festevam@gmail.com>
Date:   Wed, 24 Mar 2021 10:37:32 -0300
Message-ID: <CAOMZO5CP8Hrqgyc8VEkNqam-PoSteZ0=RkWpgOwTbZWokb8r5g@mail.gmail.com>
Subject: Re: [PATCH v2] arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
To:     =?UTF-8?Q?Oliver_St=C3=A4bler?= <oliver.staebler@bytesatwork.ch>
Cc:     Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Sascha Hauer <kernel@pengutronix.de>,
        NXP Linux Team <linux-imx@nxp.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>
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Hi Oliver,

On Wed, Mar 24, 2021 at 10:28 AM Oliver St=C3=A4bler
<oliver.staebler@bytesatwork.ch> wrote:
>
> Fix address of the pad control register
> (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
> to be a typo but it leads to an exception when pinctrl is applied due to
> wrong memory address access.
>
> Signed-off-by: Oliver St=C3=A4bler <oliver.staebler@bytesatwork.ch>

Thanks for the fix:

Reviewed-by: Fabio Estevam <festevam@gmail.com>