Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp43814pxf; Wed, 24 Mar 2021 20:25:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz37zGJDTCLxmuvtu+yhI8zFlSfawFTKTBS0AnCtEZNulrYkXD1vuFjkqLQKi7viFki3bDu X-Received: by 2002:a05:6402:1a3c:: with SMTP id be28mr6768755edb.125.1616642714542; Wed, 24 Mar 2021 20:25:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616642714; cv=none; d=google.com; s=arc-20160816; b=Ehr4fg9GXGAmb5Efol4NtYXXdpZDOVbjiciHcfFD+uEjzMz6mqWsLcaqxud9xgd4MJ ukvGfkLPT32HVIkWdENd8BUq32v6qe5AJM9RPRIGKyD45ViMwgEnZO6eyk1GhzrZ39h9 qbjRRQysbeSnX4i2691JzJkMfDjUJIXb1steym0wYaYgHeLfaDG29lbzRdP4BJ3rMN/0 cZ8ustcRacGndaZkfb7ep9qJedB8hO7s3VVgCrDKlI0viXUpFiOEdy/PFDJ9YwseWWKc f57oCzh55WUqj15d4qUBQnJd9TEW+7BsZnz/vmwcGOoSPc+uR0nbhhQ2UNLSeHVURlCW lHbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=qRW/WkbP44k6wJiJTRMfwZkQNGaCQRgEo1bGPs1Quws=; b=pmoUqyAfTvl4cYYTKFO2F6jFOZX9pbcb+qwppYK2zvKoiSTtfhBZsxdpUcd8MoaAqs /x5/pDR/UoB0BEs1gU4WL1rYLJy3f6/ycLmL0QhlhL7rzMlRydgk00ZpZfE7R5ediefp EHsYkO5kUeFgBzIBY/SO8k+VclmwLH6x3yxAKUWUsTbrt8iRfQk26omMx45+jr/HCZbO Nip1AMW+cZpQ9qITphM3LHelaB6ZuNy/dFhokpt0dVws2bJVbi4Ge8jIIZIlAziQ01H7 ncO9DgR9HHPmVyvLiZIRHcwPUkVfvqtN1xxn39g2mivjoR7o30ZcfMxLygWHuC4E1a08 pROw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p10si3127227edm.261.2021.03.24.20.24.52; Wed, 24 Mar 2021 20:25:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238085AbhCXUiP (ORCPT + 99 others); Wed, 24 Mar 2021 16:38:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:54328 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238022AbhCXUiJ (ORCPT ); Wed, 24 Mar 2021 16:38:09 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 33602619FF; Wed, 24 Mar 2021 20:38:07 +0000 (UTC) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org, Mark Rutland , will@kernel.org, linux-kernel@vger.kernel.org Cc: tglx@linutronix.de, marcan@marcan.st, james.morse@arm.com, maz@kernel.org, Arnd Bergmann Subject: Re: [PATCHv3 0/6] arm64: Support FIQ controller registration Date: Wed, 24 Mar 2021 20:38:05 +0000 Message-Id: <161661824615.1255.171177700809172747.b4-ty@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210315115629.57191-1-mark.rutland@arm.com> References: <20210315115629.57191-1-mark.rutland@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 15 Mar 2021 11:56:23 +0000, Mark Rutland wrote: > Hector's M1 support series [1] shows that some platforms have critical > interrupts wired to FIQ, and to support these platforms we need to support > handling FIQ exceptions. Other contemporary platforms don't use FIQ (since e.g. > this is usually routed to EL3), and as we never expect to take an FIQ, we have > the FIQ vector cause a panic. > > Since the use of FIQ is a platform integration detail (which can differ across > bare-metal and virtualized environments), we need be able to explicitly opt-in > to handling FIQs while retaining the existing behaviour otherwise. This series > adds a new set_handle_fiq() hook so that the FIQ controller can do so, and > where no controller is registered the default handler will panic(). For > consistency the set_handle_irq() code is made to do the same. > > [...] Applied to arm64 (for-next/fiq), thanks! [1/6] genirq: Allow architectures to override set_handle_irq() fallback https://git.kernel.org/arm64/c/b0b8b689d78c [2/6] arm64: don't use GENERIC_IRQ_MULTI_HANDLER https://git.kernel.org/arm64/c/338a743640e9 [3/6] arm64: irq: rework root IRQ handler registration https://git.kernel.org/arm64/c/8ff443cebffa [4/6] arm64: entry: factor irq triage logic into macros https://git.kernel.org/arm64/c/9eb563cdabe1 [5/6] arm64: Always keep DAIF.[IF] in sync https://git.kernel.org/arm64/c/f0098155d337 [6/6] arm64: irq: allow FIQs to be handled https://git.kernel.org/arm64/c/3889ba70102e -- Catalin