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[23.128.96.18]) by mx.google.com with ESMTP id q23si3283871edr.167.2021.03.24.20.36.37; Wed, 24 Mar 2021 20:36:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=dk6k0UOM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234267AbhCXXan (ORCPT + 99 others); Wed, 24 Mar 2021 19:30:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234628AbhCXXa1 (ORCPT ); Wed, 24 Mar 2021 19:30:27 -0400 Received: from mail-qt1-x82c.google.com (mail-qt1-x82c.google.com [IPv6:2607:f8b0:4864:20::82c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D30AC06174A for ; Wed, 24 Mar 2021 16:30:27 -0700 (PDT) Received: by mail-qt1-x82c.google.com with SMTP id a11so433388qto.2 for ; Wed, 24 Mar 2021 16:30:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MCUugQWc5ApTNLeo5R0uIFrXvl0aq1eCfWyJgRU76RY=; b=dk6k0UOMRwMwiotNFkrL5dpo4/Re9dr6Gv1Olu0MYyV/RqkA3s+6WdRKPMD5rOS8W0 zep+VEKPV68BgPuoTQrSe9/xa8d62vRfSuvl1sNMdRz1Mr3x90lD8h/I+C/nezR8o4Mv moGxEre7YqiQKSzpBJk48fThDFK4N/ZlY+jVAv4lmMAVfAgdZ0nnxPEtE07rOP0J4RJi Qzx374JdJlahZ6F1aOv1CMOlNyNGEL3c7y0yZ2RLiFKGbDlySVEG4uBQNVdNqdz2KtPY b/hVw0AMvK/doN4SvxBijLMwKzH+zwfiXj7fY1gQ1FiixuZ88lnkkWXHn+UjGcNt8UQk NWqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MCUugQWc5ApTNLeo5R0uIFrXvl0aq1eCfWyJgRU76RY=; b=n6n7lJNjVFtJUk1JAyi63QxQcSNOb6Op6Ual2JSk4fjvj9CyeneW42Jp0n+xiZ59yX eTl1/xWo9xScZS8dhl5a6m5a9RDHwcvYOcltjjn34Zhpa8zCjbcsrmIUaHYaOFjc6QL3 dDqKrNyjLzb2GAUa8YMF3DQVu4TShy2OprJJD+1Hnwybi3cLHFdCThYQBbRUpVFfymy4 kC0i1prpQ2dsheiKSxhCie5g52LE0pJ40aD3o/uUAyim5pGO7ApcpcvVUdgnQ+QoCur9 RPMc3qU2YP8Uer7G6kw2XfHwtE13Lpab3lJQnyY35kLFKwL97P0W99gFekOLHvJmcR1s kyVw== X-Gm-Message-State: AOAM530t756vVeOf1Ab0LHINLpc7pR1z3xRD81B0I0yLG+EyB7EvBdh2 gf6Wbulecseurl4eYtXrM67g+LwbNW2Hz3yk X-Received: by 2002:aed:31e4:: with SMTP id 91mr5466935qth.9.1616628626644; Wed, 24 Mar 2021 16:30:26 -0700 (PDT) Received: from Slackware.localdomain ([156.146.55.193]) by smtp.gmail.com with ESMTPSA id d10sm2861969qko.70.2021.03.24.16.30.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 16:30:25 -0700 (PDT) From: Bhaskar Chowdhury To: alexander.deucher@amd.com, christian.koenig@amd.com, airlied@linux.ie, daniel@ffwll.ch, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: rdunlap@infradead.org, Bhaskar Chowdhury Subject: [PATCH V2] drm/radeon/r600_cs: Few typo fixes Date: Thu, 25 Mar 2021 04:59:41 +0530 Message-Id: <20210324232941.21439-1-unixbhaskar@gmail.com> X-Mailer: git-send-email 2.30.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org s/miror/mirror/ s/needind/needing/ s/informations/information/ Signed-off-by: Bhaskar Chowdhury --- Changes from V1: Randy's finding incorporated ,i.e in one place,informations->information Adjusted the subject line accordingly drivers/gpu/drm/radeon/r600_cs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 34b7c6f16479..8be4799a98ef 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -38,7 +38,7 @@ extern void r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, struct r600_cs_track { - /* configuration we miror so that we use same code btw kms/ums */ + /* configuration we mirror so that we use same code btw kms/ums */ u32 group_size; u32 nbanks; u32 npipes; @@ -963,7 +963,7 @@ static int r600_cs_parse_packet0(struct radeon_cs_parser *p, * * This function will test against r600_reg_safe_bm and return 0 * if register is safe. If register is not flag as safe this function - * will test it against a list of register needind special handling. + * will test it against a list of register needing special handling. */ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) { @@ -2336,7 +2336,7 @@ int r600_cs_parse(struct radeon_cs_parser *p) /** * r600_dma_cs_next_reloc() - parse next reloc * @p: parser structure holding parsing context. - * @cs_reloc: reloc informations + * @cs_reloc: reloc information * * Return the next reloc, do bo validation and compute * GPU offset using the provided start. -- 2.30.1