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Date:   Thu, 25 Mar 2021 15:00:12 +0100
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Vinod Koul <vkoul@kernel.org>, JC Kuo <jckuo@nvidia.com>
Cc:     Kishon Vijay Abraham I <kishon@ti.com>,
        Greg KH <gregkh@linuxfoundation.org>, mturquette@baylibre.com,
        sboyd@kernel.org, robh@kernel.org, jonathanh@nvidia.com,
        linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        nkristam@nvidia.com, linux-clk@vger.kernel.org
Subject: Re: [PATCH v7 00/14] Tegra XHCI controller ELPG support
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References: <20210120073414.69208-1-jckuo@nvidia.com>
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On Thu, Mar 25, 2021 at 11:45:16AM +0530, Vinod Koul wrote:
> On 24-03-21, 14:32, Thierry Reding wrote:
> > On Wed, Mar 24, 2021 at 01:39:32PM +0100, Thierry Reding wrote:
> > > On Fri, Feb 05, 2021 at 05:22:29PM +0100, Greg KH wrote:
> > > > On Fri, Feb 05, 2021 at 05:15:21PM +0100, Thierry Reding wrote:
> > > > > On Wed, Jan 20, 2021 at 03:34:00PM +0800, JC Kuo wrote:
> > > > > > Tegra XHCI controler can be placed in ELPG (Engine Level PowerG=
ated)
> > > > > > state for power saving when all of the connected USB devices ar=
e in
> > > > > > suspended state. This patch series includes clk, phy and pmc ch=
anges
> > > > > > that are required for properly place controller in ELPG and bri=
ng
> > > > > > controller out of ELPG.
> > > > > >=20
> > > > > > JC Kuo (14):
> > > > > >   clk: tegra: Add PLLE HW power sequencer control
> > > > > >   clk: tegra: Don't enable PLLE HW sequencer at init
> > > > > >   phy: tegra: xusb: Move usb3 port init for Tegra210
> > > > > >   phy: tegra: xusb: Rearrange UPHY init on Tegra210
> > > > > >   phy: tegra: xusb: Add Tegra210 lane_iddq operation
> > > > > >   phy: tegra: xusb: Add sleepwalk and suspend/resume
> > > > > >   soc/tegra: pmc: Provide USB sleepwalk register map
> > > > > >   arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop
> > > > > >   dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop
> > > > > >   phy: tegra: xusb: Add wake/sleepwalk for Tegra210
> > > > > >   phy: tegra: xusb: Tegra210 host mode VBUS control
> > > > > >   phy: tegra: xusb: Add wake/sleepwalk for Tegra186
> > > > > >   usb: host: xhci-tegra: Unlink power domain devices
> > > > > >   xhci: tegra: Enable ELPG for runtime/system PM
> > > > > >=20
> > > > > >  .../phy/nvidia,tegra124-xusb-padctl.txt       |    1 +
> > > > > >  arch/arm64/boot/dts/nvidia/tegra210.dtsi      |    1 +
> > > > > >  drivers/clk/tegra/clk-pll.c                   |   12 -
> > > > > >  drivers/clk/tegra/clk-tegra210.c              |   53 +-
> > > > > >  drivers/phy/tegra/xusb-tegra186.c             |  558 ++++-
> > > > > >  drivers/phy/tegra/xusb-tegra210.c             | 1889 +++++++++=
++++----
> > > > > >  drivers/phy/tegra/xusb.c                      |   92 +-
> > > > > >  drivers/phy/tegra/xusb.h                      |   22 +-
> > > > > >  drivers/soc/tegra/pmc.c                       |   94 +
> > > > > >  drivers/usb/host/xhci-tegra.c                 |  613 ++++--
> > > > > >  include/linux/clk/tegra.h                     |    4 +-
> > > > > >  include/linux/phy/tegra/xusb.h                |   10 +-
> > > > > >  12 files changed, 2784 insertions(+), 565 deletions(-)
> > > > > >=20
> > > > > > v5 "phy: tegra: xusb: tegra210: Do not reset UPHY PLL" is moved
> > > > > > into v6 "phy: tegra: xusb: Rearrange UPHY init on Tegra210"
> > > > >=20
> > > > > Mike, Stephen,
> > > > >=20
> > > > > could you guys take a look at the two clk patches here and give an
> > > > > Acked-by? There's build-time dependencies throughout the series, =
so it'd
> > > > > be good if they can all go through either the PHY or USB trees.
> > > > >=20
> > > > > Kishon, Greg,
> > > > >=20
> > > > > any comments on these patches? Unfortunately, the USB patches in =
this
> > > > > series have a build-time dependency on the PHY patches, so this s=
hould
> > > > > all go through one tree. Since this all culminates in the XHCI dr=
iver,
> > > > > merging this through the USB tree might be best, provided that Ki=
shon
> > > > > provides his Acked-by on the PHY patches.
> > > > >=20
> > > > > Alternatively, I can create a set of branches with the correct
> > > > > dependencies and send out pull requests for the three subsystems =
if
> > > > > that's preferrable.
> > > >=20
> > > > I have no objection for the usb patches to go through your tree as =
they
> > > > are hardware-specific.
> > >=20
> > > Kishon,
> > >=20
> > > I haven't heard back from you on this yet. We missed v5.12 but I'd li=
ke
> > > to get this into v5.13 since it's the last missing piece to get suspe=
nd
> > > and resume working properly on a number of boards.
> > >=20
> > > Are you okay if I take this through the Tegra tree to satisfy the
> > > interdependencies between clk, PHY and USB patches? I've already got
> > > Acked-by's from the clock and USB maintainers.
> > >=20
> > > I want to tentatively take this into linux-next to give it a bit of s=
oak
> > > time before the ARM SoC -rc6 cut-off. Please let me know if you'd pre=
fer
> > > to apply these to your tree so I can back them out of the Tegra tree
> > > again.
> >=20
> > Also adding Vinod for visibility and in case Kishon's too busy.
>=20
> Yes please CC me on all things phy (MAINTAINERS should have told you so)
>=20
> If you can resend me and cc linux-phy@lists.infradead.org, I would take
> a look. FWIW since this goes thru Greg, the window closes earlier than
> merge window

Greg already agreed that it might be best to take this through the Tegra
tree because there's a bunch of dependencies. For Tegra the patches go
through ARM SoC and that usually means I have to send pull requests by
-rc6.

JC, do you have time to resend this batch this week? If not I can do it,
too.

Thierry

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