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Date:   Thu, 25 Mar 2021 13:42:23 -0300
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Subject: Re: [PATCH V2 1/5] powerpc/perf: Expose processor pipeline stage cycles using PERF_SAMPLE_WEIGHT_STRUCT
To:     Peter Zijlstra <peterz@infradead.org>,
        Arnaldo Carvalho de Melo <acme@kernel.org>
CC:     Madhavan Srinivasan <maddy@linux.ibm.com>,
        Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
        linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
        linux-perf-users@vger.kernel.org, mpe@ellerman.id.au,
        jolsa@kernel.org, ravi.bangoria@linux.ibm.com, kjain@linux.ibm.com,
        kan.liang@linux.intel.com
From:   Arnaldo <arnaldo.melo@gmail.com>
Message-ID: <2BAC42AE-6BD3-45EF-8867-1A15F25FE80B@gmail.com>
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On March 25, 2021 11:38:01 AM GMT-03:00, Peter Zijlstra <peterz@infradead=
=2Eorg> wrote:
>On Thu, Mar 25, 2021 at 10:01:35AM -0300, Arnaldo Carvalho de Melo
>wrote:=2E
>> > > Also for CPU_FTR_ARCH_31, capture the two cycle counter
>information in
>> > > two 16 bit fields of perf_sample_weight structure=2E
>> >=20
>> > Changes looks fine to me=2E
>> >=20
>> > Reviewed-by: Madhavan Srinivasan <maddy@linux=2Eibm=2Ecom>
>>=20
>> So who will process the kernel bits? I'm merging the tooling parts,
>
>I was sorta expecting these to go through the powerpc tree=2E Let me know
>if you want them in tip/perf/core instead=2E

Shouldn't matter by which tree it gets upstream, as long as it gets picked=
 :-)

- Arnaldo

--=20
Sent from my Android device with K-9 Mail=2E Please excuse my brevity=2E