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[23.128.96.18]) by mx.google.com with ESMTP id a26si6266719edx.539.2021.03.26.02.41.02; Fri, 26 Mar 2021 02:41:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230100AbhCZJhr (ORCPT + 99 others); Fri, 26 Mar 2021 05:37:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230047AbhCZJhm (ORCPT ); Fri, 26 Mar 2021 05:37:42 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3215C0613AA for ; Fri, 26 Mar 2021 02:37:41 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lPiuK-0007EC-Fu; Fri, 26 Mar 2021 10:37:32 +0100 Message-ID: Subject: Re: [PATCH v3 1/3] dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy From: Lucas Stach To: Richard Zhu , andrew.smirnov@gmail.com, shawnguo@kernel.org, kw@linux.com, bhelgaas@google.com, stefan@agner.ch, lorenzo.pieralisi@arm.com Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Date: Fri, 26 Mar 2021 10:37:30 +0100 In-Reply-To: <1616661882-26487-2-git-send-email-hongxing.zhu@nxp.com> References: <1616661882-26487-1-git-send-email-hongxing.zhu@nxp.com> <1616661882-26487-2-git-send-email-hongxing.zhu@nxp.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.4 (3.38.4-1.fc33) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Donnerstag, dem 25.03.2021 um 16:44 +0800 schrieb Richard Zhu: > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, > the VREG_BYPASS bits of GPR registers should be cleared from default > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be > turned on. > > Signed-off-by: Richard Zhu > --- >  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 +++ >  1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index de4b2baf91e8..e6d1886144ce 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -38,6 +38,9 @@ Optional properties: >    The regulator will be enabled when initializing the PCIe host and >    disabled either as part of the init process or when shutting down the >    host. > +- vph-supply: Should specify the regulator in charge of VPH one of the three > + PCIe PHY powers. This regulator can be supplied by both 1.8v and 3.3v voltage > + supplies. Might be used to distinguish different HW board designs. Please just get rid of the last sentence. All DT properties are used in one way or the other to distinguish different HW designs, so no need to mention this. Regards, Lucas