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From:   Enric Balletbo Serra <eballetbo@gmail.com>
Date:   Fri, 26 Mar 2021 10:41:16 +0100
Message-ID: <CAFqH_51V6J0tJzpzszEHSOvXx-88XuCpGGHKeyq8vT1pFT924A@mail.gmail.com>
Subject: Re: [PATCH v5 04/11] arm64: dts: rockchip: Fix power-controller node
 names for px30
To:     Elaine Zhang <zhangqing@rock-chips.com>
Cc:     Rob Herring <robh+dt@kernel.org>,
        =?UTF-8?Q?Heiko_St=C3=BCbner?= <heiko@sntech.de>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>, cl@rock-chips.com,
        huangtao@rock-chips.com, kever.yang@rock-chips.com,
        tony.xie@rock-chips.com, finley.xiao@rock-chips.com
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Missatge de Elaine Zhang <zhangqing@rock-chips.com> del dia dv., 26 de
mar=C3=A7 2021 a les 10:17:
>
> Use more generic names (as recommended in the device tree specification
> or the binding documentation)
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

> ---
>  arch/arm64/boot/dts/rockchip/px30.dtsi | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts=
/rockchip/px30.dtsi
> index c45b0cfcae09..fb3a863e0caf 100644
> --- a/arch/arm64/boot/dts/rockchip/px30.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
> @@ -247,20 +247,20 @@
>                         #size-cells =3D <0>;
>
>                         /* These power domains are grouped by VD_LOGIC */
> -                       pd_usb@PX30_PD_USB {
> +                       power-domain@PX30_PD_USB {
>                                 reg =3D <PX30_PD_USB>;
>                                 clocks =3D <&cru HCLK_HOST>,
>                                          <&cru HCLK_OTG>,
>                                          <&cru SCLK_OTG_ADP>;
>                                 pm_qos =3D <&qos_usb_host>, <&qos_usb_otg=
>;
>                         };
> -                       pd_sdcard@PX30_PD_SDCARD {
> +                       power-domain@PX30_PD_SDCARD {
>                                 reg =3D <PX30_PD_SDCARD>;
>                                 clocks =3D <&cru HCLK_SDMMC>,
>                                          <&cru SCLK_SDMMC>;
>                                 pm_qos =3D <&qos_sdmmc>;
>                         };
> -                       pd_gmac@PX30_PD_GMAC {
> +                       power-domain@PX30_PD_GMAC {
>                                 reg =3D <PX30_PD_GMAC>;
>                                 clocks =3D <&cru ACLK_GMAC>,
>                                          <&cru PCLK_GMAC>,
> @@ -268,7 +268,7 @@
>                                          <&cru SCLK_GMAC_RX_TX>;
>                                 pm_qos =3D <&qos_gmac>;
>                         };
> -                       pd_mmc_nand@PX30_PD_MMC_NAND {
> +                       power-domain@PX30_PD_MMC_NAND {
>                                 reg =3D <PX30_PD_MMC_NAND>;
>                                 clocks =3D  <&cru HCLK_NANDC>,
>                                           <&cru HCLK_EMMC>,
> @@ -281,14 +281,14 @@
>                                 pm_qos =3D <&qos_emmc>, <&qos_nand>,
>                                          <&qos_sdio>, <&qos_sfc>;
>                         };
> -                       pd_vpu@PX30_PD_VPU {
> +                       power-domain@PX30_PD_VPU {
>                                 reg =3D <PX30_PD_VPU>;
>                                 clocks =3D <&cru ACLK_VPU>,
>                                          <&cru HCLK_VPU>,
>                                          <&cru SCLK_CORE_VPU>;
>                                 pm_qos =3D <&qos_vpu>, <&qos_vpu_r128>;
>                         };
> -                       pd_vo@PX30_PD_VO {
> +                       power-domain@PX30_PD_VO {
>                                 reg =3D <PX30_PD_VO>;
>                                 clocks =3D <&cru ACLK_RGA>,
>                                          <&cru ACLK_VOPB>,
> @@ -304,7 +304,7 @@
>                                 pm_qos =3D <&qos_rga_rd>, <&qos_rga_wr>,
>                                          <&qos_vop_m0>, <&qos_vop_m1>;
>                         };
> -                       pd_vi@PX30_PD_VI {
> +                       power-domain@PX30_PD_VI {
>                                 reg =3D <PX30_PD_VI>;
>                                 clocks =3D <&cru ACLK_CIF>,
>                                          <&cru ACLK_ISP>,
> @@ -315,7 +315,7 @@
>                                          <&qos_isp_wr>, <&qos_isp_m1>,
>                                          <&qos_vip>;
>                         };
> -                       pd_gpu@PX30_PD_GPU {
> +                       power-domain@PX30_PD_GPU {
>                                 reg =3D <PX30_PD_GPU>;
>                                 clocks =3D <&cru SCLK_GPU>;
>                                 pm_qos =3D <&qos_gpu>;
> --
> 2.17.1
>
>
>
>
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