Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp1423126pxf; Fri, 26 Mar 2021 07:34:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyK708AIbi8N1zejJR2CQxQy7WKQO9xPTsEjourVJmqGgKvThU25OHPhChnaE/5rAj4TgO3 X-Received: by 2002:aa7:d7da:: with SMTP id e26mr15629114eds.269.1616769299023; Fri, 26 Mar 2021 07:34:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616769299; cv=none; d=google.com; s=arc-20160816; b=o19C3pl70yx5CUEfOkRglRffB5siea1jlhEnLjyDuVPc9TBcaofoew58k3yCsPaLuR t46LGSgVHh0EapwCONAb6vTGK7TlBPBTiIzonb1PQIgpH9SsXbL7FZEDVeXYSm+le+lP tSB0a6Xw7T30VpoeJ/IvrhV7i0195VXko58HwKOtKAE3GTvGBT+R6ihiAQEgwhpWusjp T/hb8AziL1u/4QraEKSqg04D+vcpq0BiJADQy2GhhdlvqHyQ2eNI8Sftyw9RBSPOPW/I 3xB3DtDLRWf8hQkvfxsyJj4l/Lpz0inEJC43rfQlITMvHyLTNySCYwO4W4hZNX2d/8Wh Yhkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-language:content-transfer-encoding :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=E3+iz7+neGjfWLTewjLxWW+h8VkgMgW9JnWPufGQGJg=; b=oVF/CiNw5AiY3Flh1naM7aNbEpNJSzutqGzPug4lfhvqlLQoqfg6E2ZB4KO7WnKTTE IUsDCxOeIgh+LTEQqaAVUZqPCLBu2imG2h2lKZZ94OcSKfx3qofsERfX61+h2q37T2Sq 5HdTrhHc+IWeskqqWi6A1tzMih6yEiVBMrp9Xz6Pa+mia/zDqeh6PRvFRIRPgRtjCDcS HqhKtu+qwU1s625xq5ROtjHz4kAzyRxw6mM6Leec+jb2UqvKFr9uVnVWcfAa0mn+LvHz kyb64HlfRxqOHF0u/v45YBc+9aO/yFU3Rb44bGfP+Q4bEDlPPiIdvPcbnrQSSK1TLKEz rHiA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z19si7995538ejl.54.2021.03.26.07.34.34; Fri, 26 Mar 2021 07:34:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230076AbhCZOdg (ORCPT + 99 others); Fri, 26 Mar 2021 10:33:36 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:37642 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229908AbhCZOd1 (ORCPT ); Fri, 26 Mar 2021 10:33:27 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: benjamin.gaignard) with ESMTPSA id 41A5E1F40DAB Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware To: Philipp Zabel Cc: ezequiel@collabora.com, mchehab@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, lee.jones@linaro.org, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@siol.net, hverkuil-cisco@xs4all.nl, emil.l.velikov@gmail.com, kernel@pengutronix.de, linux-imx@nxp.com, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org, kernel@collabora.com References: <20210318082046.51546-1-benjamin.gaignard@collabora.com> <20210318082046.51546-14-benjamin.gaignard@collabora.com> <20210326142440.GD8441@pengutronix.de> From: Benjamin Gaignard Message-ID: <4df3c9e4-0983-6007-f3b3-323882f903cf@collabora.com> Date: Fri, 26 Mar 2021 15:33:22 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210326142440.GD8441@pengutronix.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 26/03/2021 à 15:24, Philipp Zabel a écrit : > On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote: >> Split VPU node in two: one for G1 and one for G2 since they are >> different hardware blocks. >> Add syscon for hardware control block. >> Remove reg-names property that is useless. >> Each VPU node only need one interrupt. >> >> Signed-off-by: Benjamin Gaignard >> --- >> version 5: >> - use syscon instead of VPU reset >> >> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++----- >> 1 file changed, 34 insertions(+), 9 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi >> index 17c449e12c2e..b537d153ebbd 100644 >> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi >> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi >> @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@382f0040 { >> status = "disabled"; >> }; >> >> - vpu: video-codec@38300000 { >> + vpu_ctrl: syscon@38320000 { >> + compatible = "nxp,imx8mq-vpu-ctrl", "syscon"; >> + reg = <0x38320000 0x10000>; >> + }; >> + >> + vpu_g1: video-codec@38300000 { >> compatible = "nxp,imx8mq-vpu"; >> - reg = <0x38300000 0x10000>, >> - <0x38310000 0x10000>, >> - <0x38320000 0x10000>; >> - reg-names = "g1", "g2", "ctrl"; >> - interrupts = , >> - ; >> - interrupt-names = "g1", "g2"; >> + reg = <0x38300000 0x10000>; >> + interrupts = ; >> + interrupt-names = "g1"; >> clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, >> <&clk IMX8MQ_CLK_VPU_G2_ROOT>, >> <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; >> @@ -1350,9 +1351,33 @@ vpu: video-codec@38300000 { >> <&clk IMX8MQ_VPU_PLL_OUT>, >> <&clk IMX8MQ_SYS1_PLL_800M>, >> <&clk IMX8MQ_VPU_PLL>; >> - assigned-clock-rates = <600000000>, <600000000>, >> + assigned-clock-rates = <600000000>, <300000000>, > I'd like to see this mentioned in the commit message. Yes I would do that. The value comes from the datasheet. > >> + <800000000>, <0>; >> + power-domains = <&pgc_vpu>; >> + nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>; >> + }; >> + >> + vpu_g2: video-codec@38310000 { >> + compatible = "nxp,imx8mq-vpu-g2"; >> + reg = <0x38310000 0x10000>; >> + interrupts = ; >> + interrupt-names = "g2"; >> + clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, >> + <&clk IMX8MQ_CLK_VPU_G2_ROOT>, >> + <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; >> + clock-names = "g1", "g2", "bus"; >> + assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>, > Can the G1 clock configuration be dropped from the G2 device node and > the G2 clock configuration from the G1 device node? It looks weird that > these devices configure each other's clocks. No because if only one device node is enabled we need to configure the both clocks anyway. Benjamin > > regards > Philipp >