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[23.128.96.18]) by mx.google.com with ESMTP id n14si12156755edo.179.2021.03.29.00.03.07; Mon, 29 Mar 2021 00:03:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230502AbhC2HCQ (ORCPT + 99 others); Mon, 29 Mar 2021 03:02:16 -0400 Received: from mga09.intel.com ([134.134.136.24]:51195 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229655AbhC2HBr (ORCPT ); Mon, 29 Mar 2021 03:01:47 -0400 IronPort-SDR: eu0uloTq5GknLAQSqWUwtYZOAsm43oj1HuWKt0B/dv7Vf7815aWmIai3j8nhF5lPqEiVGMXXur upD5Sl578n6Q== X-IronPort-AV: E=McAfee;i="6000,8403,9937"; a="191590345" X-IronPort-AV: E=Sophos;i="5.81,287,1610438400"; d="scan'208";a="191590345" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2021 00:01:47 -0700 IronPort-SDR: 7eMm8J4/KWuTBUGXEHSzkQG6sjsU+MARu++39QFv9K7t5tCoLxKbu1Y3SyJ9jQt92kXUVxOvkG h9GCiZxhdppw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,287,1610438400"; d="scan'208";a="444677260" Received: from kbl-ppc.sh.intel.com ([10.239.159.163]) by FMSMGA003.fm.intel.com with ESMTP; 29 Mar 2021 00:01:44 -0700 From: Jin Yao To: acme@kernel.org, jolsa@kernel.org, peterz@infradead.org, mingo@redhat.com, alexander.shishkin@linux.intel.com Cc: Linux-kernel@vger.kernel.org, ak@linux.intel.com, kan.liang@intel.com, yao.jin@intel.com, Jin Yao Subject: [PATCH v3 02/27] perf jevents: Support unit value "cpu_core" and "cpu_atom" Date: Mon, 29 Mar 2021 15:00:21 +0800 Message-Id: <20210329070046.8815-3-yao.jin@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210329070046.8815-1-yao.jin@linux.intel.com> References: <20210329070046.8815-1-yao.jin@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For some Intel platforms, such as Alderlake, which is a hybrid platform and it consists of atom cpu and core cpu. Each cpu has dedicated event list. Part of events are available on core cpu, part of events are available on atom cpu. The kernel exports new cpu pmus: cpu_core and cpu_atom. The event in json is added with a new field "Unit" to indicate which pmu the event is available on. For example, one event in cache.json, { "BriefDescription": "Counts the number of load ops retired that", "CollectPEBSRecord": "2", "Counter": "0,1,2,3", "EventCode": "0xd2", "EventName": "MEM_LOAD_UOPS_RETIRED_MISC.MMIO", "PEBScounters": "0,1,2,3", "SampleAfterValue": "1000003", "UMask": "0x80", "Unit": "cpu_atom" }, The unit "cpu_atom" indicates this event is only availabe on "cpu_atom". In generated pmu-events.c, we can see: { .name = "mem_load_uops_retired_misc.mmio", .event = "period=1000003,umask=0x80,event=0xd2", .desc = "Counts the number of load ops retired that. Unit: cpu_atom ", .topic = "cache", .pmu = "cpu_atom", }, But if without this patch, the "uncore_" prefix is added before "cpu_atom", such as: .pmu = "uncore_cpu_atom" That would be a wrong pmu. Signed-off-by: Jin Yao --- v3: - No change. tools/perf/pmu-events/jevents.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 33aa3c885eaf..ed4f0bd72e5a 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -285,6 +285,8 @@ static struct map { { "imx8_ddr", "imx8_ddr" }, { "L3PMC", "amd_l3" }, { "DFPMC", "amd_df" }, + { "cpu_core", "cpu_core" }, + { "cpu_atom", "cpu_atom" }, {} }; -- 2.17.1