Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp3770595pxf; Mon, 29 Mar 2021 10:54:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyxh92vuQjlWflVxEbaUQl7+H6HzI1JvHUh/xPg9V4DHq4Zx7YIzyDDHIKCwbkl66ZPehVI X-Received: by 2002:a17:906:ecfb:: with SMTP id qt27mr29052876ejb.245.1617040465457; Mon, 29 Mar 2021 10:54:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617040465; cv=none; d=google.com; s=arc-20160816; b=sVUGrV+4rj8ncpPUCNzDafQ+1Qg6Xd1SzEbBiJagTX8q7Z2eam+G541gYozSUrfA6Z Va/g5vl7EnoEboBeuOxslbCbG/vNwW8onqw3Nd9wZwBWCKRHkgjkuxtvnH6BBnZHndxP rd0PK/ULuZoPAMKYVzBkwZejfd2JjJi8FoIX+n3wLdWgBzHk5mrFpIMxjNxvYjwLhbyN Y5lwClrESjU6bFUVbUTjMl2jmLwTh3zTmZVhsJasqppkDJ9AyCmm83TeJfToeGGKij15 4ecC1F/EZPrVxpTedUkVqRIuRLgxJ/4G93oJc0u9YoiHsd7VgFASCIxoSXGePgzt6yib x9vQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=cDNxBdms6n2a0pEZc8BM4djt3U8qzxu4gOpdHcTYqO4=; b=FVBI3gKEgBstsg+5lWKh3DlP/yAIyFpBjKekLKU0NSAqUNDkv2+bNXjJuvciCVBK9j yo+E2LPI+SnO4Xw+VQPb9ZK0A6bdDFbN1Y9Nv2UjTtZXLTzZIU3STCb5m7qVhssHd8cJ Gqh6CK7HNk/LOawx+knHhuVfZdzZWa7rx2vVA8eC/3AA5xp8LVL6Jd8OxY7ye0/AsMnx nwVFJOw2OLjR1tP4HzNPPqqczEQHZUPf/Fr33vxH0tdbtskerXGrc/YpRP4uFlDDtYnb 9r2orVlgMz5ocC4E9zZOimpfoLFTdItjH+5g9JhpfisgRakOpTndU1rgSvEBPe78w14f AgMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u3si9759922edc.305.2021.03.29.10.54.02; Mon, 29 Mar 2021 10:54:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231299AbhC2Rvj (ORCPT + 99 others); Mon, 29 Mar 2021 13:51:39 -0400 Received: from aposti.net ([89.234.176.197]:38858 "EHLO aposti.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231314AbhC2RvN (ORCPT ); Mon, 29 Mar 2021 13:51:13 -0400 From: Paul Cercueil To: David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Simon Ser Cc: Sam Ravnborg , od@zcrc.me, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Paul Cercueil , stable@vger.kernel.org Subject: [PATCH 1/2] drm/ingenic: Switch IPU plane to type OVERLAY Date: Mon, 29 Mar 2021 18:50:45 +0100 Message-Id: <20210329175046.214629-2-paul@crapouillou.net> In-Reply-To: <20210329175046.214629-1-paul@crapouillou.net> References: <20210329175046.214629-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org It should have been an OVERLAY from the beginning. The documentation stipulates that there should be an unique PRIMARY plane per CRTC. Fixes: fc1acf317b01 ("drm/ingenic: Add support for the IPU") Cc: # 5.8+ Signed-off-by: Paul Cercueil --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 11 +++++------ drivers/gpu/drm/ingenic/ingenic-ipu.c | 2 +- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index 29742ec5ab95..09225b770bb8 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -419,7 +419,7 @@ static void ingenic_drm_plane_enable(struct ingenic_drm *priv, unsigned int en_bit; if (priv->soc_info->has_osd) { - if (plane->type == DRM_PLANE_TYPE_PRIMARY) + if (plane != &priv->f0) en_bit = JZ_LCD_OSDC_F1EN; else en_bit = JZ_LCD_OSDC_F0EN; @@ -434,7 +434,7 @@ void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane) unsigned int en_bit; if (priv->soc_info->has_osd) { - if (plane->type == DRM_PLANE_TYPE_PRIMARY) + if (plane != &priv->f0) en_bit = JZ_LCD_OSDC_F1EN; else en_bit = JZ_LCD_OSDC_F0EN; @@ -461,8 +461,7 @@ void ingenic_drm_plane_config(struct device *dev, ingenic_drm_plane_enable(priv, plane); - if (priv->soc_info->has_osd && - plane->type == DRM_PLANE_TYPE_PRIMARY) { + if (priv->soc_info->has_osd && plane != &priv->f0) { switch (fourcc) { case DRM_FORMAT_XRGB1555: ctrl |= JZ_LCD_OSDCTRL_RGB555; @@ -510,7 +509,7 @@ void ingenic_drm_plane_config(struct device *dev, } if (priv->soc_info->has_osd) { - if (plane->type == DRM_PLANE_TYPE_PRIMARY) { + if (plane != &priv->f0) { xy_reg = JZ_REG_LCD_XYP1; size_reg = JZ_REG_LCD_SIZE1; } else { @@ -561,7 +560,7 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, height = newstate->src_h >> 16; cpp = newstate->fb->format->cpp[0]; - if (!priv->soc_info->has_osd || plane->type == DRM_PLANE_TYPE_OVERLAY) + if (!priv->soc_info->has_osd || plane == &priv->f0) hwdesc = &priv->dma_hwdescs->hwdesc_f0; else hwdesc = &priv->dma_hwdescs->hwdesc_f1; diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c index 5ae6adab8306..3b1091e7c0cd 100644 --- a/drivers/gpu/drm/ingenic/ingenic-ipu.c +++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c @@ -767,7 +767,7 @@ static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d) err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs, soc_info->formats, soc_info->num_formats, - NULL, DRM_PLANE_TYPE_PRIMARY, NULL); + NULL, DRM_PLANE_TYPE_OVERLAY, NULL); if (err) { dev_err(dev, "Failed to init plane: %i\n", err); return err; -- 2.30.2