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Subject: Re: [PATCH v2 2/6] clk: sifive: Use reset-simple in prci driver for PCIe driver
From:   Stephen Boyd <sboyd@kernel.org>
To:     alex.dewar90@gmail.com, aou@eecs.berkeley.edu, bhelgaas@google.com,
        devicetree@vger.kernel.org, erik.danie@sifive.com,
        greentime.hu@sifive.com, hayashi.kunihiko@socionext.com,
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        palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
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Date:   Mon, 29 Mar 2021 12:14:02 -0700
Message-ID: <161704524201.3012082.13807741329367593907@swboyd.mtv.corp.google.com>
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Quoting Greentime Hu (2021-03-17 23:08:09)
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 71ab75a46491..f094df93d911 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -173,7 +173,7 @@ config RESET_SCMI
> =20
>  config RESET_SIMPLE
>         bool "Simple Reset Controller Driver" if COMPILE_TEST
> -       default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTE=
K || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
> +       default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTE=
K || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC || RISCV

This conflicts. Can this default be part of the riscv defconfig instead?

>         help
>           This enables a simple reset controller driver for reset lines t=
hat
>           that can be asserted and deasserted by toggling bits in a conti=
guous,
> @@ -187,6 +187,7 @@ config RESET_SIMPLE
>            - RCC reset controller in STM32 MCUs
>            - Allwinner SoCs
>            - ZTE's zx2967 family
> +          - SiFive FU740 SoCs
> =20
>  config RESET_STM32MP157
>         bool "STM32MP157 Reset Driver" if COMPILE_TEST