Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp3836376pxf; Mon, 29 Mar 2021 12:55:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxuBQFT1Y06FvQHdlVc6TTY2c/sii5eHdrJOZTbDHxviJUdRcW9ZagY1bGodDPnFik5P3Vb X-Received: by 2002:a05:6402:1545:: with SMTP id p5mr29898401edx.155.1617047701472; Mon, 29 Mar 2021 12:55:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617047701; cv=none; d=google.com; s=arc-20160816; b=v/608ijSHZXimkRN8GbCuE6odPkXceRnYau1qA4PIZ4mD+RD2gM71iJQFIEyz8ZTgQ /d9xL7Nhmd3ksV3x8IdDPl0nmC0BUC4tbVfmS5gXkOxpm9ZJ5MCjDobqX7POUvOe/ImM rkcZ1a30x3xbzXZtXSjrqc4keKdsaSchkLr5hgMztX6lwjmP2tBG4l1y+3MEQp+AGjmT 7OluM2Nj8vN0375sZdVyVUmOpw+bqUlOb9xAaG+Zfw+8rA0g7vkNT6Mmz4DLI5TQW6+c 1e+L5+KoetmPXpgcfn6XOvR0eTG4G++f5DOtzV7f+HDowe+o3pziuwe7Y5XIvDVwjlo0 jRsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dmarc-filter:sender:dkim-signature; bh=adS35U+pR56eiHjLYAtC8yrWZVVjIFd/pMCm9/2gNa4=; b=ZG2Y5Rv2sA9MISOIPTjXRFNcQLjcotwlGCTRHZ3ROI9FuyLS1sVKLdkM+Bzv59qVjz xRf3FypCTDcIz9G2tnqzIFj23l/Cph/L+0PY5TSIhU01kDmB7FowWZ8kIBF68mAcIVB7 Qm176/SAiIPMU9Z/JNywnirVdZeEFRxHsiZs2kkT51GHB5UP+wjTj81aE31Z3LKHQvlx RHdh5ankf93KapS93RQMEQYtu601pkDFRxZ2JDZnh33mvGiLLL0SsdMu+PQehT6bnsFx /C+8U1eO5hEmYW9w6LML4Hyh7rNt1p8XqiHPXtjUf9N23zTNi2zdumc2JFiXcvMcZj1Y pZ8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mg.codeaurora.org header.s=smtp header.b="BiqmgK3/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v6si13558246ejk.379.2021.03.29.12.54.37; Mon, 29 Mar 2021 12:55:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mg.codeaurora.org header.s=smtp header.b="BiqmgK3/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231707AbhC2Txm (ORCPT + 99 others); Mon, 29 Mar 2021 15:53:42 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:59912 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229884AbhC2TxO (ORCPT ); Mon, 29 Mar 2021 15:53:14 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1617047594; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=adS35U+pR56eiHjLYAtC8yrWZVVjIFd/pMCm9/2gNa4=; b=BiqmgK3/UfC2awvp3K3fkjAWHSnxpE2C+QpSpV9Rk0RHyqJM9XmC9wWK07bw6QBLHCp4B5tm zoKVRRx4BRjG3f99WfKNDAJTSeckrGasdxwA/MPLRGKB5oRxtGS7EdA/Du0JMMIFiBc/Snzl xV/1KosBExDcuMfP2LUHjQY1c7g= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n04.prod.us-east-1.postgun.com with SMTP id 60623028c39407c327a25b9e (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 29 Mar 2021 19:53:12 GMT Sender: bbhatt=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 7E635C43462; Mon, 29 Mar 2021 19:53:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00,SPF_FAIL autolearn=no autolearn_force=no version=3.4.0 Received: from malabar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 91E6AC433CA; Mon, 29 Mar 2021 19:53:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 91E6AC433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, carl.yin@quectel.com, naveen.kumar@quectel.com, loic.poulain@linaro.org, Bhaumik Bhatt Subject: [PATCH v5 1/2] bus: mhi: core: Introduce internal register poll helper function Date: Mon, 29 Mar 2021 12:53:02 -0700 Message-Id: <1617047583-12104-2-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1617047583-12104-1-git-send-email-bbhatt@codeaurora.org> References: <1617047583-12104-1-git-send-email-bbhatt@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce helper function to allow MHI core driver to poll for a value in a register field. This helps reach a common path to read and poll register values along with a retry time interval. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/internal.h | 3 +++ drivers/bus/mhi/core/main.c | 23 +++++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h index 6f80ec3..005286b 100644 --- a/drivers/bus/mhi/core/internal.h +++ b/drivers/bus/mhi/core/internal.h @@ -643,6 +643,9 @@ int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl, int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 mask, u32 shift, u32 *out); +int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, + void __iomem *base, u32 offset, u32 mask, + u32 shift, u32 val, u32 delayus); void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 val); void mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index 4e0131b..6f4b630 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -4,6 +4,7 @@ * */ +#include #include #include #include @@ -37,6 +38,28 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, return 0; } +int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, + void __iomem *base, u32 offset, + u32 mask, u32 shift, u32 val, u32 delayus) +{ + int ret; + u32 out, retry = (mhi_cntrl->timeout_ms * 1000) / delayus; + + while (retry--) { + ret = mhi_read_reg_field(mhi_cntrl, base, offset, mask, shift, + &out); + if (ret) + return ret; + + if (out == val) + return 0; + + fsleep(delayus); + } + + return -ENOENT; +} + void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 val) { -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project