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Date:   Tue, 30 Mar 2021 16:34:47 +0200 (CEST)
From:   "Maciej W. Rozycki" <macro@orcam.me.uk>
To:     =?UTF-8?Q?Pali_Roh=C3=A1r?= <pali@kernel.org>
cc:     David Laight <David.Laight@ACULAB.COM>,
        'Amey Narkhede' <ameynarkhede03@gmail.com>,
        "alex.williamson@redhat.com" <alex.williamson@redhat.com>,
        "helgaas@kernel.org" <helgaas@kernel.org>,
        "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
        "kabel@kernel.org" <kabel@kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "raphael.norwitz@nutanix.com" <raphael.norwitz@nutanix.com>
Subject: Re: How long should be PCIe card in Warm Reset state?
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On Tue, 30 Mar 2021, Pali Rohár wrote:

> >  If I were to implement this stuff, for good measure I'd give it a safety 
> > margin beyond what the spec requires and use a timeout of say 2-4s while 
> > actively querying the status of the device.  The values given in the spec 
> > are only the minimum requirements.
> 
> Are you able to also figure out what is the minimal timeout value for 
> PCIe Warm Reset?
> 
> Because we are having troubles to "decode" correct minimal timeout value
> for this PCIe Warm Reset (not Function-level reset).

 The spec does not give any exceptions AFAICT as to the timeouts required 
between the three kinds of a Conventional Reset (Hot, Warm, or Cold) and 
refers to them collectively as a Conventional Reset across the relevant 
parts of the document, so clearly the same rules apply.

  Maciej