Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp4437669pxf; Tue, 30 Mar 2021 07:51:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwK1J/2Oxj+2YZFP+mjt71nCWPTzg0lCIXHgmX5H2LCXvT+93zoGIZvl4R9Z6S5gJwwsiiK X-Received: by 2002:a17:906:2ac1:: with SMTP id m1mr33818657eje.472.1617115885265; Tue, 30 Mar 2021 07:51:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617115885; cv=none; d=google.com; s=arc-20160816; b=08g8j6NrRnj1z7UC+iIwDvaPTVpXHhC61SK9dtbQBXdVumeD2tuJsnhDaC8DVtqtWs c5p2XqKnHAjt3fH0C0/00fU+hkYcH8GxYjIw8UTY+GlLTfc8DadRd1lRf8AN+66VSxgF 0pU1EFElqXMQFQGxXir5wl9zQFa2LKV/Ny/zaLz7BOd0p9uMXOUN9hUiFLaRmkyH1ncm AdZYVXGCIQgWQr6F3DjEuYp/7MHDuB56ofMJWRwsBXcxv2IdoQ9gqowq3yC3Ay9XsPVP gw60zvxY32ZiHF2/WM4NbF6wdLZU93YBRvVFloZWLu1LU2tu/UWe2jHMHkSfAUbg8Bns SSAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=GB5iLmcbC5lPVRfSKkHoO/i5g8RTlo8abXNaxgv7NOY=; b=KxdIpnhHc7wDCT4iHcoS3DcQ/2o4+xQ9tSoi8a6pGqr3JFpXk8NtgwRCHU4Hf+8Jjg 5vq07y445mXC6PEok4gUpy6gPn27AqIq3I+c53U5UhWCEcbynuSDU8Zc2wqG4QnrSdKM WpkzwSYx1EZnRdYc8AuWxZGuAa0W+gLdNXJPE4iZ/2tcI66N2s2SaKU6k9RcW/22Ty/7 M4bWMFjJCuizpbXl2CawL0qodV2/CCqt47Q3w0ndoL9gyAkJTWX0GtxuhILlOObgo9dc NLctIYNIa35BlYcP3GFNyzlWcfIh/cj/IkIqPO6GwzRDHxxE46SGL56kYZ610Vzj3VG1 DXqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a20si14824156ejf.345.2021.03.30.07.50.59; Tue, 30 Mar 2021 07:51:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231636AbhC3OuD (ORCPT + 99 others); Tue, 30 Mar 2021 10:50:03 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:54972 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232285AbhC3Otc (ORCPT ); Tue, 30 Mar 2021 10:49:32 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1lRFgO-00E2Bg-LN; Tue, 30 Mar 2021 16:49:28 +0200 Date: Tue, 30 Mar 2021 16:49:28 +0200 From: Andrew Lunn To: Oleksij Rempel Cc: Shawn Guo , Sascha Hauer , Florian Fainelli , Heiner Kallweit , Fugang Duan , kernel@pengutronix.de, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Fabio Estevam , David Jander , Russell King , Philippe Schenker Subject: Re: [PATCH net-next v1 2/3] net: phy: at803x: AR8085: add loopback support Message-ID: References: <20210330135407.17010-1-o.rempel@pengutronix.de> <20210330135407.17010-3-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210330135407.17010-3-o.rempel@pengutronix.de> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 30, 2021 at 03:54:06PM +0200, Oleksij Rempel wrote: > PHY loopback is needed for the ethernet controller self test support. > This PHY was tested with the FEC sefltest. > > Signed-off-by: Oleksij Rempel > --- > drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c > index d7799beb811c..8679738cf2ab 100644 > --- a/drivers/net/phy/at803x.c > +++ b/drivers/net/phy/at803x.c > @@ -326,6 +326,30 @@ static int at803x_resume(struct phy_device *phydev) > return phy_modify(phydev, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 0); > } > > +static int at803x_loopback(struct phy_device *phydev, bool enable) > +{ > + int ret; > + > + if (enable) > + ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE); > + else > + ret = phy_set_bits(phydev, MII_BMCR, BMCR_ANENABLE); Auto-neg might of been turned off when entering self test. So you should leave it off when existing self test. Or maybe call phy_config_aneg() which should reconfigure the PHY back how it was. Andrew