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Wed, 31 Mar 2021 12:59:33 +0000 Received: from nvdebian.localnet (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 31 Mar 2021 12:59:30 +0000 From: Alistair Popple To: Jason Gunthorpe CC: , , , , , , , , , , , , , , "Christoph Hellwig" Subject: Re: [PATCH v7 5/8] mm: Device exclusive memory access Date: Wed, 31 Mar 2021 23:59:28 +1100 Message-ID: <2521635.masqiumSp9@nvdebian> In-Reply-To: <20210330193234.GA2356281@nvidia.com> References: <20210326000805.2518-1-apopple@nvidia.com> <20210326000805.2518-6-apopple@nvidia.com> <20210330193234.GA2356281@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2c958375-292d-419d-1aaf-08d8f444d4f1 X-MS-TrafficTypeDiagnostic: BN6PR12MB1426: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2657; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Mar 2021 12:59:33.9340 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c958375-292d-419d-1aaf-08d8f444d4f1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT053.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1426 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday, 31 March 2021 6:32:34 AM AEDT Jason Gunthorpe wrote: > On Fri, Mar 26, 2021 at 11:08:02AM +1100, Alistair Popple wrote: > > diff --git a/mm/memory.c b/mm/memory.c > > index 3a5705cfc891..33d11527ef77 100644 > > +++ b/mm/memory.c > > @@ -781,6 +781,27 @@ copy_nonpresent_pte(struct mm_struct *dst_mm, struct mm_struct *src_mm, > > pte = pte_swp_mkuffd_wp(pte); > > set_pte_at(src_mm, addr, src_pte, pte); > > } > > + } else if (is_device_exclusive_entry(entry)) { > > + page = pfn_swap_entry_to_page(entry); > > + > > + get_page(page); > > + rss[mm_counter(page)]++; > > + > > + if (is_writable_device_exclusive_entry(entry) && > > + is_cow_mapping(vm_flags)) { > > + /* > > + * COW mappings require pages in both > > + * parent and child to be set to read. > > + */ > > + entry = make_readable_device_exclusive_entry( > > + swp_offset(entry)); > > + pte = swp_entry_to_pte(entry); > > + if (pte_swp_soft_dirty(*src_pte)) > > + pte = pte_swp_mksoft_dirty(pte); > > + if (pte_swp_uffd_wp(*src_pte)) > > + pte = pte_swp_mkuffd_wp(pte); > > + set_pte_at(src_mm, addr, src_pte, pte); > > + } > > This needs to have the same logic as we now have in > copy_present_page(). The page *is* present and we can't copy the PTE > value hidden in a swap entry if we can't copy the PTE normally. You're saying we need to use copy_present_page() to make sure the split goes the right way for pinned pages? I guess that makes sense as the split could go either way at the moment but I should add a check to make sure this isn't used with pinned pages anyway. - Alistair > The code should be shared because nobody is going to remember about > this corner case. > > Jason >