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[23.128.96.18]) by mx.google.com with ESMTP id mj17si3761831ejb.28.2021.04.01.01.06.44; Thu, 01 Apr 2021 01:07:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yhSocdsA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233445AbhDAIE6 (ORCPT + 99 others); Thu, 1 Apr 2021 04:04:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233434AbhDAIEl (ORCPT ); Thu, 1 Apr 2021 04:04:41 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2101C0613E6 for ; Thu, 1 Apr 2021 01:04:40 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id b2-20020a7bc2420000b029010be1081172so429554wmj.1 for ; Thu, 01 Apr 2021 01:04:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to; bh=QM7rCia0E0f24qsTX0VNJrlQHlXgwo18P09kK6//nHk=; b=yhSocdsAAbgIsDtLEU0fY/HIso3rH7inzjIXLFT2uUqVzWbWlqxWe4DTcnH5D5bIVc pbOX6dPSSUEH0L3M80PSVZ2QeODWtGPyWeG/XcxOG3pti3etGR6X7WK4/bHgQKZnZAqo r83ckH4EUrq7Sz2TFI/+tHy/5ZmpTKrqS5mwYwlDzhjRr0Y9+1nEUgTkHj6aeFPWGB3H Ki0ciNfnUmMeOcHicDFUuILl2Y4l+hIeh448kEqVE2yxnoTL6XlA2sFvmt1LgNXw4IdY nrOQXR2DSdT6OXeV47OHU3h5Wa9hKX6zzPfpGJJqqQyRAXeX+IH0zjwNUHL6zgXq8J/q Yagg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=QM7rCia0E0f24qsTX0VNJrlQHlXgwo18P09kK6//nHk=; b=ij64ZphkvJSYnUvF9AUiIVDgPwoZynf2iacRFR94FQiKTgeRTgJBqHg4h9BKCQbCYe 8XOv+7UoRmpMDEDU9tdcR8e5JksFOw7tQ973mY9MHZAU+BRVDyQvWAGz5QIbeyO+rXOJ XIMWfNOA8WwK1KZTe28obR5EqqD/t4B6b/c4DGfDvV5so+jc1hAH0QqC3O6bwIYJoXxk FT16v7HaihufO2FKuFaQd0p43NuihCzbyFjdldwdpa2uq7WkHm3H4xykbd0nIxF5Z2a8 lnjD5A8gO8xHxxQ8pl/xwu8sivMegE/ztIEnvz0Jt3rLNMuUdMK/mi6lGQ+bMTGvVG6z fuVg== X-Gm-Message-State: AOAM533PUpCGOMgZscESKSwC6IlWexcX/9qvBioiv/fDmqVI+YuApGyy A/j8atJ5a0caNiCV6Vcsqc4gUg== X-Received: by 2002:a05:600c:203:: with SMTP id 3mr6755143wmi.88.1617264279366; Thu, 01 Apr 2021 01:04:39 -0700 (PDT) Received: from dell ([91.110.221.182]) by smtp.gmail.com with ESMTPSA id r14sm8741396wrw.91.2021.04.01.01.04.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Apr 2021 01:04:38 -0700 (PDT) Date: Thu, 1 Apr 2021 09:04:37 +0100 From: Lee Jones To: Andy Shevchenko Cc: Matthias Schiffer , Linus Walleij , Bartosz Golaszewski , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List Subject: Re: [PATCH 3/3] mfd: tqmx86: add support for TQMxE40M Message-ID: <20210401080437.GM2916463@dell> References: <3c19d714645f788913956223097adc360ceb6203.1617189926.git.matthias.schiffer@ew.tq-group.com> <83d7ea27b27225727fec7b077efe1a67ba1184a9.camel@ew.tq-group.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 31 Mar 2021, Andy Shevchenko wrote: > On Wed, Mar 31, 2021 at 4:33 PM Matthias Schiffer > wrote: > > On Wed, 2021-03-31 at 15:37 +0300, Andy Shevchenko wrote: > > > On Wed, Mar 31, 2021 at 2:38 PM Matthias Schiffer > > > wrote: > > ... > > > > > + return 24000; > > > > > > AFAICS it will return 24 MHz for "Unknown" board. Is it okay to be so brave? > > > > As noted in the commit message, our hardware developers intend to use > > 24 MHz for all future x86 SoMs. > > What may go wrong in the future?.. (rhetorical question, obviously) My preference would be to be explicit. Rather than support boards implicitly i.e. by accident. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog