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[23.128.96.18]) by mx.google.com with ESMTP id h28si5181829edj.546.2021.04.01.11.07.03; Thu, 01 Apr 2021 11:07:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=ifnqDCES; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238016AbhDASFO (ORCPT + 99 others); Thu, 1 Apr 2021 14:05:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236919AbhDARth (ORCPT ); Thu, 1 Apr 2021 13:49:37 -0400 Received: from mail-io1-xd34.google.com (mail-io1-xd34.google.com [IPv6:2607:f8b0:4864:20::d34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46170C0617AB; Thu, 1 Apr 2021 04:28:05 -0700 (PDT) Received: by mail-io1-xd34.google.com with SMTP id k8so1797603iop.12; Thu, 01 Apr 2021 04:28:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=moOyGRcGHar9YNt0N/Y7uFjPvSME0sZl6mnpRsX5JvU=; b=ifnqDCESEWCwygu7Q8TcEEjwG35Ap4TGL1lIxVlgSIHnbzmG25rF7VK74GW/oT/Lgh 2UJ9bIQNzSDOlkch2hOCYH1HpIqOco9idX9WVqPyouTWaS8Ou04kvDlzHghlRMp4jHPf nskapKeDijNI6NmbdwMQ0kmLLDvSqDkg1MFJwvHTqGAGSsKLk5VXeqNC5Euy8zgxYvnF O3TzXfeLmGd9cTk7Hw7vPqePTLusUXV5nmy1w7nHwPPWrDqSZAM1o5RCdXpXwBhAZ9SF he5bn3R+I/nx5KU477ajaxMPDRxH3dbiHtmAvkpsU7i0mKguLtw3QMN4BcDqvQv0/j90 uHKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=moOyGRcGHar9YNt0N/Y7uFjPvSME0sZl6mnpRsX5JvU=; b=kHhW+NJQO3z63t/oCc+6zGf8AhETEZabjnLpYw4FXB7iG35u2fc30tSO9+tVymtdeO JCZR4QmFL2OiI2jMiJtoP2SMWn5RqjrP44sa28ft7G9tJTaiA4X9EHEWFqVA0Ar4mipk n6hla3mMHMPc8TZH+MM0mvvKcI+23znEY2u5STX/UNw6u3ht/SqfNyPb+Ena2CRvWejR +L/KpN+IHXcU89bDuES+8zB0zTOIsEPqvBIMHvMWov6IPyDqTLpzd327x/8S8uZ1ZOkD DeRbmcYYbytKkn2lcyBYR8rLd6kSQpOZiIzqN7Rh2LMhQYGKexuX9LRYa46cXxvzx1tc GxMg== X-Gm-Message-State: AOAM533BHM4sBB3om+ON/d6xRvL0Ngl+Z9InSujeZmgYvMPWUq852m7t QmngFRiMURBi+ppQAVJTVqDd6RXKeWfiu1OMJGSClh+xhZrFLA== X-Received: by 2002:a05:6602:21cd:: with SMTP id c13mr6082518ioc.44.1617275764762; Thu, 01 Apr 2021 04:16:04 -0700 (PDT) MIME-Version: 1.0 References: <4c259d34b5943bf384fd3cb0d98eccf798a34f0f.1615038553.git.syednwaris@gmail.com> <36db7be3-73b6-c822-02e8-13e3864b0463@xilinx.com> In-Reply-To: From: Syed Nayyar Waris Date: Thu, 1 Apr 2021 16:45:52 +0530 Message-ID: Subject: Re: [PATCH v3 3/3] gpio: xilinx: Utilize generic bitmap_get_value and _set_value To: Bartosz Golaszewski Cc: Michal Simek , Andy Shevchenko , William Breathitt Gray , Arnd Bergmann , Robert Richter , Linus Walleij , Masahiro Yamada , Andrew Morton , Zhang Rui , Daniel Lezcano , Amit Kucheria , Linux-Arch , linux-gpio , LKML , arm-soc , linux-pm , Srinivas Goud , Srinivas Neeli Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 31, 2021 at 8:56 PM Srinivas Neeli wrote: > > Hi, > > > -----Original Message----- > > From: Bartosz Golaszewski > > Sent: Friday, March 26, 2021 10:58 PM > > To: Michal Simek > > Cc: Syed Nayyar Waris ; Srinivas Neeli > > ; Andy Shevchenko > > ; William Breathitt Gray > > ; Arnd Bergmann ; Robert > > Richter ; Linus Walleij ; > > Masahiro Yamada ; Andrew Morton > > ; Zhang Rui ; Daniel > > Lezcano ; Amit Kucheria > > ; Linux-Arch ; > > linux-gpio ; LKML > kernel@vger.kernel.org>; arm-soc ; > > linux-pm ; Srinivas Goud > > Subject: Re: [PATCH v3 3/3] gpio: xilinx: Utilize generic bitmap_get_value and > > _set_value > > > > On Mon, Mar 8, 2021 at 8:13 AM Michal Simek > > wrote: > > > > > > > > > > > > On 3/6/21 3:06 PM, Syed Nayyar Waris wrote: > > > > This patch reimplements the xgpio_set_multiple() function in > > > > drivers/gpio/gpio-xilinx.c to use the new generic functions: > > > > bitmap_get_value() and bitmap_set_value(). The code is now simpler > > > > to read and understand. Moreover, instead of looping for each bit in > > > > xgpio_set_multiple() function, now we can check each channel at a > > > > time and save cycles. > > > > > > > > Cc: Bartosz Golaszewski > > > > Cc: Michal Simek > > > > Signed-off-by: Syed Nayyar Waris > > > > Acked-by: William Breathitt Gray > > > > --- > > > > drivers/gpio/gpio-xilinx.c | 63 > > > > +++++++++++++++++++------------------- > > > > 1 file changed, 32 insertions(+), 31 deletions(-) > > > > > > > > diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c > > > > index be539381fd82..8445e69cf37b 100644 > > > > --- a/drivers/gpio/gpio-xilinx.c > > > > +++ b/drivers/gpio/gpio-xilinx.c > > > > @@ -15,6 +15,7 @@ > > > > #include > > > > #include > > > > #include > > > > +#include "gpiolib.h" > > > > > > > > /* Register Offset Definitions */ > > > > #define XGPIO_DATA_OFFSET (0x0) /* Data register */ > > > > @@ -141,37 +142,37 @@ static void xgpio_set_multiple(struct > > > > gpio_chip *gc, unsigned long *mask, { > > > > unsigned long flags; > > > > struct xgpio_instance *chip = gpiochip_get_data(gc); > > > > - int index = xgpio_index(chip, 0); > > > > - int offset, i; > > > > - > > > > - spin_lock_irqsave(&chip->gpio_lock[index], flags); > > > > - > > > > - /* Write to GPIO signals */ > > > > - for (i = 0; i < gc->ngpio; i++) { > > > > - if (*mask == 0) > > > > - break; > > > > - /* Once finished with an index write it out to the register */ > > > > - if (index != xgpio_index(chip, i)) { > > > > - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + > > > > - index * XGPIO_CHANNEL_OFFSET, > > > > - chip->gpio_state[index]); > > > > - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); > > > > - index = xgpio_index(chip, i); > > > > - spin_lock_irqsave(&chip->gpio_lock[index], flags); > > > > - } > > > > - if (__test_and_clear_bit(i, mask)) { > > > > - offset = xgpio_offset(chip, i); > > > > - if (test_bit(i, bits)) > > > > - chip->gpio_state[index] |= BIT(offset); > > > > - else > > > > - chip->gpio_state[index] &= ~BIT(offset); > > > > - } > > > > - } > > > > - > > > > - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + > > > > - index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]); > > > > - > > > > - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); > > > > + u32 *const state = chip->gpio_state; > > > > + unsigned int *const width = chip->gpio_width; > > > > + > > > > + DECLARE_BITMAP(old, 64); > > > > + DECLARE_BITMAP(new, 64); > > > > + DECLARE_BITMAP(changed, 64); > > > > + > > > > + spin_lock_irqsave(&chip->gpio_lock[0], flags); > > > > + spin_lock(&chip->gpio_lock[1]); > > > > + > > > > + bitmap_set_value(old, 64, state[0], width[0], 0); > > > > + bitmap_set_value(old, 64, state[1], width[1], width[0]); > > > > + bitmap_replace(new, old, bits, mask, gc->ngpio); > > > > + > > > > + bitmap_set_value(old, 64, state[0], 32, 0); > > > > + bitmap_set_value(old, 64, state[1], 32, 32); > > > > + state[0] = bitmap_get_value(new, 0, width[0]); > > > > + state[1] = bitmap_get_value(new, width[0], width[1]); > > > > + bitmap_set_value(new, 64, state[0], 32, 0); > > > > + bitmap_set_value(new, 64, state[1], 32, 32); > > > > + bitmap_xor(changed, old, new, 64); > > > > + > > > > + if (((u32 *)changed)[0]) > > > > + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET, > > > > + state[0]); > > > > + if (((u32 *)changed)[1]) > > > > + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + > > > > + XGPIO_CHANNEL_OFFSET, state[1]); > > > > + > > > > + spin_unlock(&chip->gpio_lock[1]); > > > > + spin_unlock_irqrestore(&chip->gpio_lock[0], flags); > > > > } > > > > > > > > /** > > > > > > > > > > Srinivas N: Can you please test this code? > > > > > > Thanks, > > > Michal > > > > Hey, any chance of getting that Tested-by? > I tested patches with few modifications in code (spin_lock handling and merge conflict). > functionality wise it's working fine. > > > > > Bart Hi Bartosz, May I please know the URL of the tree that you are using. I had been using the tree below for submitting this patchset on GPIO to you. https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git I think I am using the wrong tree. On which tree should I base my patches on for my next (v4) submission? Should I use the tree below? : https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git Regards Syed Nayyar Waris