Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp712509pxf; Thu, 1 Apr 2021 11:32:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxoFNa+E5cLXYUZabLN5+0ode6SlcXG0x5+qz0Fg7BK/y7Prbb2Op93trq4nr4QgkLY2qCN X-Received: by 2002:a05:6e02:6d2:: with SMTP id p18mr7761746ils.251.1617301934963; Thu, 01 Apr 2021 11:32:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617301934; cv=none; d=google.com; s=arc-20160816; b=SlxXPdEWClFy+fMeSUcnONS0roVvTs6PnIgMqDEiFNyxROwJhPXOLzgXEYw/GFydgX rZ1bEbyZP4g4bK8p/2vyxA0SH0RDFDzWa/veEqsUUTNbzyc4LaDjxC/9WkjYV4b0C1H/ /dultbbW7tBgsdGg27MVVOkOqYG3zsSZ6We4lGXZWJA97Ld41mz4u6T6pP+eIsYRen8Q ARbatCcOVAwdJbG4Y4q9qbqhS3wAMoDZaYCdmyT/q9LQbzKHzyJMz67j2ZWTsZ2PZCGG S2xCZHxjCH189dNt5/vzAGbo34XIR11glgZP/v3xjsnr9z59mhP1ejb8JCKrcm/FrV16 4+fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=D7qbhRgMmN16Y3scdoUeCe0vaSxxAhsnIPM+ep4qtds=; b=GDvNHsxHubAip3v6+xnJyH8J+qbCsNiXTtmyebJes9RnBFPHCs21e0npScpggaL31P V32lJfFpgHOLbakyyyPNeeYh2zDVY277Tv3RlxYskNEjUx9ckjDSlUrLIojLV2pu5ThA frCUNOd7A2cld5hC90H8fHAAx7sA3R7GsWT2Q+ePuIIlYZSDUqLJ7eda7w/lQriXVAVz pfQx0BBzJaXqZ4XE41J/hM75tKIvtcl7S1p3DCdD7dOQ7EcoTjZmob89ofVDRVWwcHd8 /tTNa98wvQSqLIXsiZAYNhgtYzv68/A8rJkoH3qRpvrYJKdQn2Pf22eHoGL1ElrZbs0S 2qzQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l11si5230593iop.53.2021.04.01.11.31.58; Thu, 01 Apr 2021 11:32:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238567AbhDAS3B (ORCPT + 99 others); Thu, 1 Apr 2021 14:29:01 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:15522 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237913AbhDASE6 (ORCPT ); Thu, 1 Apr 2021 14:04:58 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FB0xd0r8ZzPnQ6; Thu, 1 Apr 2021 19:16:37 +0800 (CST) Received: from localhost.localdomain (10.67.165.24) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.498.0; Thu, 1 Apr 2021 19:19:10 +0800 From: Qi Liu To: , CC: , , Subject: [PATCH] arm64: perf: Remove redundant initialization in perf_event.c Date: Thu, 1 Apr 2021 19:16:41 +0800 Message-ID: <1617275801-1980-1-git-send-email-liuqi115@huawei.com> X-Mailer: git-send-email 2.8.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The initialization of value in function armv8pmu_read_hw_counter() and armv8pmu_read_counter() seem redundant, as they are soon updated. So, We can remove them. Signed-off-by: Qi Liu --- arch/arm64/kernel/perf_event.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 4658fcf..f594957 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -470,9 +470,8 @@ static inline u64 armv8pmu_read_evcntr(int idx) static inline u64 armv8pmu_read_hw_counter(struct perf_event *event) { int idx = event->hw.idx; - u64 val = 0; + u64 val = armv8pmu_read_evcntr(idx); - val = armv8pmu_read_evcntr(idx); if (armv8pmu_event_is_chained(event)) val = (val << 32) | armv8pmu_read_evcntr(idx - 1); return val; @@ -520,7 +519,7 @@ static u64 armv8pmu_read_counter(struct perf_event *event) { struct hw_perf_event *hwc = &event->hw; int idx = hwc->idx; - u64 value = 0; + u64 value; if (idx == ARMV8_IDX_CYCLE_COUNTER) value = read_sysreg(pmccntr_el0); -- 2.8.1