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Date:   Mon, 5 Apr 2021 19:25:54 +0200
From:   Jonathan =?utf-8?Q?Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
To:     Jonathan =?utf-8?Q?Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
Cc:     Marc Zyngier <maz@kernel.org>, openbmc@lists.ozlabs.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Avi Fishman <avifishman70@gmail.com>,
        Tomer Maimon <tmaimon77@gmail.com>,
        Tali Perry <tali.perry1@gmail.com>,
        Patrick Venture <venture@google.com>,
        Nancy Yuen <yuenn@google.com>,
        Benjamin Fair <benjaminfair@google.com>,
        Russell King <linux@armlinux.org.uk>,
        Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH 08/14] irqchip: Add driver for WPCM450 interrupt
 controller
Message-ID: <YGtIItromiJcS+D5@latitude>
References: <20210320181610.680870-1-j.neuschaefer@gmx.net>
 <20210320181610.680870-9-j.neuschaefer@gmx.net>
 <87sg4kiia4.wl-maz@kernel.org>
 <YF4tV+L71Lso94kT@latitude>
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On Fri, Mar 26, 2021 at 07:52:07PM +0100, Jonathan Neusch=C3=A4fer wrote:
> On Wed, Mar 24, 2021 at 05:16:35PM +0000, Marc Zyngier wrote:
> > On Sat, 20 Mar 2021 18:16:04 +0000, Jonathan Neusch=C3=A4fer <j.neuscha=
efer@gmx.net> wrote:
[...]
> > > +	/* Disable (mask) all interrupts */
> > > +	writel(0xffffffff, aic->regs + AIC_MDCR);
> >=20
> > Consider using relaxed accessors throughout this driver.
>=20
> I'll read up on how to use them correctly.

Upon further consideration, I decided not to bother with relaxed MMIO
access, because it doesn't make a difference on the target platform =E2=80=
=94
Nuvoton WPCM450 with ARM926 (ARMv5).


Best regards,
Jonathan Neusch=C3=A4fer

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